changeset 67081684c03e in /z/repo/gem5
details: http://repo.gem5.org/gem5?cmd=changeset;node=67081684c03e
description:
inorder: ISA-zero reg handling
ignore writes to the ISA zero register
diffstat:
src/cpu/inorder/cpu.cc | 12 +++++++++---
1 files changed, 9 insertions(+), 3 deletions(-)
diffs (23 lines):
diff -r 6a15522216c3 -r 67081684c03e src/cpu/inorder/cpu.cc
--- a/src/cpu/inorder/cpu.cc Sun Jun 19 21:43:34 2011 -0400
+++ b/src/cpu/inorder/cpu.cc Sun Jun 19 21:43:34 2011 -0400
@@ -1135,10 +1135,16 @@
void
InOrderCPU::setIntReg(RegIndex reg_idx, uint64_t val, ThreadID tid)
{
- DPRINTF(IntRegs, "[tid:%i]: Setting Int. Reg %i to %x\n",
- tid, reg_idx, val);
+ if (reg_idx == TheISA::ZeroReg) {
+ DPRINTF(IntRegs, "[tid:%i]: Ignoring Setting of ISA-ZeroReg "
+ "(Int. Reg %i) to %x\n", tid, reg_idx, val);
+ return;
+ } else {
+ DPRINTF(IntRegs, "[tid:%i]: Setting Int. Reg %i to %x\n",
+ tid, reg_idx, val);
- intRegs[tid][reg_idx] = val;
+ intRegs[tid][reg_idx] = val;
+ }
}
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