Messages by Thread
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[gem5-dev] Change in gem5/gem5[master]: cpu-o3: Fix bug in LSQUnit(uint32_t, uint32_t) ctor
Anthony Gutierrez (Gerrit)
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[gem5-dev] Change in gem5/gem5[master]: arch, arm: Update miscRegs in getTE
Anouk Van Laer (Gerrit)
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[gem5-dev] RISC-V Atomic Op Patches
Alec Roelke
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[gem5-dev] Change in gem5/gem5[master]: base, systemc: Fix clang compilation
Giacomo Travaglini (Gerrit)
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[gem5-dev] Change in gem5/gem5[master]: mem: Compile tracePacket only when TRACING_ON is defined
Giacomo Travaglini (Gerrit)
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[gem5-dev] Change in gem5/gem5[master]: mem-cache: Workaround for setWhenReady assertion
Daniel Carvalho (Gerrit)
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[gem5-dev] Prevent symlinking of source files in the build directory
Ciro Santilli
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[gem5-dev] Quick (And probably long) regressions broken
Giacomo Travaglini
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[gem5-dev] Change in gem5/gem5[master]: mem-cache: Add access delay to block eviction
Daniel Carvalho (Gerrit)
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[gem5-dev] Change in gem5/gem5[master]: mem-cache: Immediately forward uncacheable accesses to miss buffers
Daniel Carvalho (Gerrit)
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[gem5-dev] Change in gem5/gem5[master]: mem-cache: Do not wait for data access on writes
Daniel Carvalho (Gerrit)
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[gem5-dev] integrating systemc tests into testing framework
Gabe Black
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[gem5-dev] Change in gem5/gem5[master]: systemc: Update signals before initing processes.
Gabe Black (Gerrit)
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[gem5-dev] Change in gem5/gem5[master]: systemc: Ensure resets and edges are notified when signaling a change.
Gabe Black (Gerrit)
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[gem5-dev] Change in gem5/gem5[master]: systemc: Update the ordering in the reference output for some tests.
Gabe Black (Gerrit)
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[gem5-dev] Change in gem5/gem5[master]: systemc: Update test output for longer lived processes.
Gabe Black (Gerrit)
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[gem5-dev] Change in gem5/gem5[master]: systemc: Ignore process control functions on terminated processes.
Gabe Black (Gerrit)
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[gem5-dev] Problem with dyn insts/refcnt pointers in O3 LSQ.
Gutierrez, Anthony
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[gem5-dev] Change in gem5/gem5[master]: mem-cache: Remove writebacks parameter from serviceMSHRTargets
Daniel Carvalho (Gerrit)
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[gem5-dev] Change in gem5/gem5[master]: mem-cache: Add header delay to handleFill whenReady
Daniel Carvalho (Gerrit)
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[gem5-dev] Change in gem5/gem5[master]: mem-cache: Make CleanEvict only access tag array
Daniel Carvalho (Gerrit)
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[gem5-dev] Change in gem5/gem5[master]: mem-cache: Add lookup latency to access' whenReady
Daniel Carvalho (Gerrit)
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[gem5-dev] Change in gem5/gem5[master]: mem-cache: Remove old todo about latency in hit function
Daniel Carvalho (Gerrit)
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[gem5-dev] Change in gem5/gem5[master]: mem-cache: Use header delay on latency calculation
Daniel Carvalho (Gerrit)
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[gem5-dev] Change in gem5/gem5[master]: mem-cache: Implementation of the Best Offset Prefetcher (BOP) describ...
Ivan Pizarro (Gerrit)
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[gem5-dev] Change in gem5/gem5[master]: mem-cache: Updated version of the Signature Path Preftcher
Javier Bueno Hedo (Gerrit)
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[gem5-dev] Change in gem5/gem5[master]: base, sim: Add missing destructors
Nikos Nikoleris (Gerrit)
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[gem5-dev] Change in gem5/gem5[master]: scons: Workaround for LLVM's lack of support for weak linking
Nikos Nikoleris (Gerrit)
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[gem5-dev] Change in gem5/gem5[master]: sim-se: Change include <syscall.h> to include <sys/syscall.h>
Nikos Nikoleris (Gerrit)
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[gem5-dev] Change in gem5/gem5[master]: base: Fix fiber compilation issue for Mac OS
Nikos Nikoleris (Gerrit)
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[gem5-dev] Change in gem5/gem5[master]: ext: Build googlemock with googletest
Giacomo Travaglini (Gerrit)
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[gem5-dev] Change in gem5/gem5[master]: cpu: Fixed typos in parameter/stats descriptions
Pau Cabre (Gerrit)
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[gem5-dev] Change in gem5/gem5[master]: arch-x86: Add sys/syscalls.h to x86 process.cc
Anthony Gutierrez (Gerrit)
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[gem5-dev] Change in gem5/gem5[master]: systemc: Disable systemc when using gcc versions older than 5.0.
Gabe Black (Gerrit)
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[gem5-dev] Change in gem5/gem5[master]: mem-cache: Signature Path Prefetcher
Javier Bueno Hedo (Gerrit)
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[gem5-dev] Change in gem5/gem5[master]: mem-cache: Fix recvTimingReq doWritebacks tick
Daniel Carvalho (Gerrit)
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[gem5-dev] Change in gem5/gem5[master]: mem-cache: allow prefetchers to emit page crossing references
Javier Bueno Hedo (Gerrit)
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[gem5-dev] Change in gem5/gem5[master]: mem-cache: Add parameter for tag-only access
Daniel Carvalho (Gerrit)
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[gem5-dev] Change in gem5/gem5[master]: mem-cache: Add R/W information to calculateAccessLatency
Daniel Carvalho (Gerrit)
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[gem5-dev] Change in gem5/gem5[master]: mem-cache: Add getter and setter to CacheBlk::whenReady
Daniel Carvalho (Gerrit)
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[gem5-dev] Change in gem5/gem5[master]: ext: Import googlemock, release version 1.8.0
Giacomo Travaglini (Gerrit)
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[gem5-dev] custom allocator for Request/Packet objects
Gabe Black
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[gem5-dev] Change in gem5/gem5[master]: base: Fix include order in the inifile unit test.
Gabe Black (Gerrit)
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[gem5-dev] Change in gem5/gem5[master]: base: Rename unit test cc files to be *.test.cc.
Gabe Black (Gerrit)
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[gem5-dev] Change in gem5/gem5[master]: base: Change the unit test binary names to use .test, and to be consi...
Gabe Black (Gerrit)
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[gem5-dev] Unit test naming convention
Gabe Black
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[gem5-dev] Change in gem5/gem5[master]: mem-cache: Support for page crossing prefetches
Javier Bueno Hedo (Gerrit)
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[gem5-dev] Change in gem5/gem5[master]: arch-arm: Add missing template declaration
Nikos Nikoleris (Gerrit)
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[gem5-dev] Change in gem5/gem5[master]: base: Add missing overrides in statistics header
Nikos Nikoleris (Gerrit)
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[gem5-dev] Change in gem5/gem5[master]: base, arch-arm: clang compilation fixes
Giacomo Travaglini (Gerrit)
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[gem5-dev] Change in gem5/gem5[master]: base: IniFile dumping to ostream
Giacomo Travaglini (Gerrit)
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[gem5-dev] Change in gem5/gem5[master]: util: Add the scons configuration cache to .gitignore for util/tlm.
Gabe Black (Gerrit)
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[gem5-dev] Change in gem5/gem5[master]: hsail: Fix a warning/build failure for HSAIL_X86.
Gabe Black (Gerrit)
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[gem5-dev] Change in gem5/gem5[master]: arch, base, cpu, gpu, mem: Replace assert(0 or false with panic.
Gabe Black (Gerrit)
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[gem5-dev] Change in gem5/gem5[master]: cpu: Use correct way index in the LTAGE loop predictor
Louis Delhez (Gerrit)
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[gem5-dev] GCC4.X support
Giacomo Travaglini
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[gem5-dev] Change in gem5/gem5[master]: tests: Convert IniFile unit test to a GTest
Giacomo Travaglini (Gerrit)
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[gem5-dev] ARM SVE Patchset
Giacomo Travaglini
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[gem5-dev] Mail bounces
Daniel Carvalho
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[gem5-dev] Change in gem5/gem5[master]: cpu: Added parameters to enable/disable features in LTAGE
Pau Cabre (Gerrit)
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[gem5-dev] Change in gem5/gem5[master]: sim-se: only implement getdentsFunc on supported hosts
Ciro Santilli (Gerrit)
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[gem5-dev] Change in gem5/gem5[master]: systemc: set endianess to fix build for ARM host
Ciro Santilli (Gerrit)
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[gem5-dev] Change in gem5/gem5[master]: arch-arm: Reverting some changes in the headers for tlb and table_wal...
Ivan Pizarro (Gerrit)
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[gem5-dev] Change in gem5/gem5[master]: arch-arm: Additional bits in misc ARM registers to use with the TLB a...
Ivan Pizarro (Gerrit)
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[gem5-dev] Change in gem5/gem5[master]: cpu: Added new stats to TAGE and LTAGE branch predictors
Pau Cabre (Gerrit)
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[gem5-dev] Change in gem5/gem5[master]: systemc: Add DEPS files for some tests with non-source file dependenc...
Gabe Black (Gerrit)
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[gem5-dev] Change in gem5/gem5[master]: systemc: Run the systemc tests with the CWD in the build directory.
Gabe Black (Gerrit)
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[gem5-dev] Change in gem5/gem5[master]: systemc: Make verify.py recognize a DEPS file in test dirs.
Gabe Black (Gerrit)
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[gem5-dev] Change in gem5/gem5[master]: systemc: Update the gem5-within-systemc README to mention USE_SYSTEMC.
Gabe Black (Gerrit)
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[gem5-dev] Change in gem5/gem5[master]: systemc: Run the systemc tests directly from their build directories.
Gabe Black (Gerrit)
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[gem5-dev] Change in gem5/gem5[master]: cpu, arch: Replace the CCReg type with RegVal.
Gabe Black (Gerrit)
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[gem5-dev] Change in gem5/gem5[master]: arch-arm: fix the aarch64 GDB stub
Ciro Santilli (Gerrit)
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[gem5-dev] Change in gem5/gem5[master]: arch-arm: correctly set floats from GDB on aarch64
Ciro Santilli (Gerrit)
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[gem5-dev] Change in gem5/gem5[master]: base: increase the GDB buffer size
Ciro Santilli (Gerrit)
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[gem5-dev] Change in gem5/gem5[master]: arch-arm: only change the pc address when GDB registers are set
Ciro Santilli (Gerrit)
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[gem5-dev] Change in gem5/gem5[master]: x86: Get rid of a problematic DPRINTF in PremFp.
Gabe Black (Gerrit)
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[gem5-dev] Change in gem5/gem5[master]: x86: Stop using/defining some ISA specific register types.
Gabe Black (Gerrit)
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[gem5-dev] Change in gem5/gem5[master]: null: Get rid of some register type definitions.
Gabe Black (Gerrit)
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[gem5-dev] Change in gem5/gem5[master]: hsail: Remove the MiscReg type.
Gabe Black (Gerrit)
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[gem5-dev] Change in gem5/gem5[master]: cpu: Stop using unions to store FP registers.
Gabe Black (Gerrit)
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[gem5-dev] Change in gem5/gem5[master]: alpha: Stop using architecture specific register types.
Gabe Black (Gerrit)
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[gem5-dev] Change in gem5/gem5[master]: base: arch: Get rid of the now unused FloatRegVal type.
Gabe Black (Gerrit)
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[gem5-dev] Change in gem5/gem5[master]: base: Add some functions to convert floats to bits and vice versa.
Gabe Black (Gerrit)
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[gem5-dev] Change in gem5/gem5[master]: mips: Stop using architecture specific register types.
Gabe Black (Gerrit)
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[gem5-dev] Change in gem5/gem5[master]: power: Get rid of some ISA specific register types.
Gabe Black (Gerrit)
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[gem5-dev] Change in gem5/gem5[master]: arch: cpu: Rename *FloatRegBits* to *FloatReg*.
Gabe Black (Gerrit)
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[gem5-dev] Change in gem5/gem5[master]: riscv: Get rid of some ISA specific register types.
Gabe Black (Gerrit)
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[gem5-dev] Change in gem5/gem5[master]: arch, cpu: Remove float type accessors.
Gabe Black (Gerrit)
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[gem5-dev] Change in gem5/gem5[master]: arch: Make the ISA parser always use binary floating point accessors.
Gabe Black (Gerrit)
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[gem5-dev] Change in gem5/gem5[master]: cpu: split LTAGE implementation into a base TAGE and a derived LTAGE
Pau Cabre (Gerrit)
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[gem5-dev] Getting rid of the FloatReg accessors
Gabe Black
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[gem5-dev] Change in gem5/gem5[master]: cpu: Made LTAGE parameters configurable
Pau Cabre (Gerrit)
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[gem5-dev] Change in gem5/gem5[master]: mem-cache: virtual address support for prefetchers
Javier Bueno Hedo (Gerrit)
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[gem5-dev] Change in gem5/gem5[master]: mem-cache: a missing cast was truncating addresses
Javier Bueno Hedo (Gerrit)
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[gem5-dev] Change in gem5/gem5[master]: sim: Deschedule existing events when destructing an event queue.
Gabe Black (Gerrit)