changeset a2396560f01c in /z/repo/gem5
details: http://repo.gem5.org/gem5?cmd=changeset;node=a2396560f01c
description:
inorder: no dep. tracking for zero reg
this causes forwarding a bad value register value
diffstat:
src/cpu/inorder/cpu.cc | 1 -
src/cpu/inorder/reg_dep_map.cc | 19 ++++++++++++++++++-
src/cpu/inorder/resources/decode_unit.cc | 4 ++++
src/cpu/inorder/resources/graduation_unit.cc | 4 ++--
src/cpu/inorder/resources/use_def.cc | 20 +++++++++++++++++---
5 files changed, 41 insertions(+), 7 deletions(-)
diffs (113 lines):
diff -r 5dbee14a7363 -r a2396560f01c src/cpu/inorder/cpu.cc
--- a/src/cpu/inorder/cpu.cc Sun Jun 19 21:43:37 2011 -0400
+++ b/src/cpu/inorder/cpu.cc Sun Jun 19 21:43:37 2011 -0400
@@ -1312,7 +1312,6 @@
lastCommittedPC[tid] = comm_pc;
TheISA::advancePC(comm_pc, inst->staticInst);
pcState(comm_pc, tid);
- DPRINTF(InOrderGraduation, "Precise State PC = %s\n", pcState(tid));
//@todo: may be unnecessary with new-ISA-specific branch handling code
if (inst->isControl()) {
diff -r 5dbee14a7363 -r a2396560f01c src/cpu/inorder/reg_dep_map.cc
--- a/src/cpu/inorder/reg_dep_map.cc Sun Jun 19 21:43:37 2011 -0400
+++ b/src/cpu/inorder/reg_dep_map.cc Sun Jun 19 21:43:37 2011 -0400
@@ -103,6 +103,14 @@
inst->seqNum, i, raw_idx, flat_idx);
inst->flattenDestReg(i, flat_idx);
+
+ if (flat_idx == TheISA::ZeroReg) {
+ DPRINTF(IntRegs, "[sn:%i]: Ignoring Insert-Dependency tracking for
"
+ "ISA-ZeroReg (Int. Reg %i).\n", inst->seqNum,
+ flat_idx);
+ continue;
+ }
+
insert(reg_type, flat_idx, inst);
}
}
@@ -134,8 +142,17 @@
for (int i = 0; i < dest_regs; i++) {
+ RegIndex flat_idx = inst->flattenedDestRegIdx(i);
+
+ if (flat_idx == TheISA::ZeroReg) {
+ DPRINTF(IntRegs, "[sn:%i]: Ignoring Remove-Dependency tracking
for "
+ "ISA-ZeroReg (Int. Reg %i).\n", inst->seqNum,
+ flat_idx);
+ continue;
+ }
+
InOrderCPU::RegType reg_type =
cpu->getRegType(inst->destRegIdx(i));
- remove(reg_type, inst->flattenedDestRegIdx(i), inst);
+ remove(reg_type, flat_idx, inst);
}
}
}
diff -r 5dbee14a7363 -r a2396560f01c src/cpu/inorder/resources/decode_unit.cc
--- a/src/cpu/inorder/resources/decode_unit.cc Sun Jun 19 21:43:37 2011 -0400
+++ b/src/cpu/inorder/resources/decode_unit.cc Sun Jun 19 21:43:37 2011 -0400
@@ -62,6 +62,10 @@
{
assert(!inst->staticInst->isMacroop());
+ DPRINTF(Decode,"Decoded instruction [sn:%i]: %s : 0x%x\n",
+ inst->seqNum, inst->instName(),
+ inst->staticInst->machInst);
+
inst->setBackSked(cpu->createBackEndSked(inst));
if (inst->backSked != NULL) {
diff -r 5dbee14a7363 -r a2396560f01c
src/cpu/inorder/resources/graduation_unit.cc
--- a/src/cpu/inorder/resources/graduation_unit.cc Sun Jun 19 21:43:37
2011 -0400
+++ b/src/cpu/inorder/resources/graduation_unit.cc Sun Jun 19 21:43:37
2011 -0400
@@ -78,8 +78,8 @@
}
DPRINTF(InOrderGraduation,
- "[tid:%i] Graduating instruction %s [sn:%i].\n",
- tid, inst->instName(), inst->seqNum);
+ "[tid:%i]:[sn:%i]: Graduating instruction %s.\n",
+ tid, inst->seqNum, inst->instName());
// Release Non-Speculative "Block" on instructions that could not
// execute because there was a non-speculative inst. active.
diff -r 5dbee14a7363 -r a2396560f01c src/cpu/inorder/resources/use_def.cc
--- a/src/cpu/inorder/resources/use_def.cc Sun Jun 19 21:43:37 2011 -0400
+++ b/src/cpu/inorder/resources/use_def.cc Sun Jun 19 21:43:37 2011 -0400
@@ -181,9 +181,16 @@
RegIndex flat_idx = cpu->flattenRegIdx(reg_idx, reg_type, tid);
inst->flattenSrcReg(ud_idx, flat_idx);
- DPRINTF(InOrderUseDef, "[tid:%i]: [sn:%i]: Attempting to read
source "
- "register idx %i (reg #%i, flat#%i).\n",
- tid, seq_num, ud_idx, reg_idx, flat_idx);
+ if (flat_idx == TheISA::ZeroReg) {
+ DPRINTF(InOrderUseDef, "[tid:%i]: [sn:%i]: Ignoring Reading of
ISA-ZeroReg "
+ "(Int. Reg %i).\n", tid, inst->seqNum, flat_idx);
+ ud_req->done();
+ return;
+ } else {
+ DPRINTF(InOrderUseDef, "[tid:%i]: [sn:%i]: Attempting to read
source "
+ "register idx %i (reg #%i, flat#%i).\n",
+ tid, seq_num, ud_idx, reg_idx, flat_idx);
+ }
if (regDepMap[tid]->canRead(reg_type, flat_idx, inst)) {
switch (reg_type)
@@ -324,6 +331,13 @@
RegIndex reg_idx = inst->_destRegIdx[ud_idx];
RegIndex flat_idx = cpu->flattenRegIdx(reg_idx, reg_type, tid);
+ if (flat_idx == TheISA::ZeroReg) {
+ DPRINTF(IntRegs, "[tid:%i]: Ignoring Writing of ISA-ZeroReg "
+ "(Int. Reg %i)\n", tid, flat_idx);
+ ud_req->done();
+ return;
+ }
+
if (regDepMap[tid]->canWrite(reg_type, flat_idx, inst)) {
DPRINTF(InOrderUseDef, "[tid:%i]: [sn:%i]: Flattening register
idx %i "
"(%i) and Attempting to write to Register File.\n",
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