changeset d389b6ec0e2d in /z/repo/gem5
details: http://repo.gem5.org/gem5?cmd=changeset;node=d389b6ec0e2d
description:
alpha: make hwrei a control inst
this always changes the PC and is basically an impromptu branch
instruction. why
not speculate on this instead of always be forced to mispredict/squash
after the
hwrei gets resolved?
The InOrder model needs this marked as "isControl" so it knows to
update the PC
after the ALU executes it. If this isnt marked as control, then it's
going to
force the model to check the PC of every instruction at commit (what O3
does?),
and that would be a wasteful check for a very high percentage of
instructions.
diffstat:
src/arch/alpha/isa/decoder.isa | 2 +-
1 files changed, 1 insertions(+), 1 deletions(-)
diffs (12 lines):
diff -r 7cd61d925338 -r d389b6ec0e2d src/arch/alpha/isa/decoder.isa
--- a/src/arch/alpha/isa/decoder.isa Sun Jun 19 21:43:39 2011 -0400
+++ b/src/arch/alpha/isa/decoder.isa Sun Jun 19 21:43:39 2011 -0400
@@ -935,7 +935,7 @@
0x1e: decode PALMODE {
0: OpcdecFault::hw_rei();
format BasicOperate {
- 1: hw_rei({{ xc->hwrei(); }}, IsSerializing, IsSerializeBefore);
+ 1: hw_rei({{ xc->hwrei(); }}, IsSerializing, IsSerializeBefore,
IsControl);
}
}
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