changeset 4a0c9c9409e4 in /z/repo/gem5
details: http://repo.gem5.org/gem5?cmd=changeset;node=4a0c9c9409e4
description:
X86: Eliminate an unused argument for building store microops.
diffstat:
src/arch/x86/isa/microops/ldstop.isa | 5 +----
1 files changed, 1 insertions(+), 4 deletions(-)
diffs (29 lines):
diff -r 00766f5b8177 -r 4a0c9c9409e4 src/arch/x86/isa/microops/ldstop.isa
--- a/src/arch/x86/isa/microops/ldstop.isa Mon Jun 20 22:44:24 2011 -0400
+++ b/src/arch/x86/isa/microops/ldstop.isa Tue Jun 21 19:28:14 2011 -0700
@@ -177,7 +177,6 @@
fault = write(xc, Mem, EA, memFlags);
if(fault == NoFault)
{
- %(post_code)s;
%(op_wb)s;
}
}
@@ -411,8 +410,7 @@
'(StoreCheck << FlagShift) | Request::LOCKED')
defineMicroLoadOp('Ldfp', 'FpData.uqw = Mem;', big = False)
- def defineMicroStoreOp(mnemonic, code, \
- postCode="", completeCode="", mem_flags="0"):
+ def defineMicroStoreOp(mnemonic, code, completeCode="", mem_flags="0"):
global header_output
global decoder_output
global exec_output
@@ -423,7 +421,6 @@
# Build up the all register version of this micro op
iop = InstObjParams(name, Name, 'X86ISA::LdStOp',
{"code": code,
- "post_code": postCode,
"complete_code": completeCode,
"ea_code": calculateEA})
header_output += MicroLdStOpDeclare.subst(iop)
_______________________________________________
gem5-dev mailing list
[email protected]
http://m5sim.org/mailman/listinfo/gem5-dev
