I'm on vcation at the moment, but please don't commit this until geoff and I can look at it. I think it undoes the Dix we put in.
Thanks, Ali Sent from my mobile device On Jul 3, 2011, at 5:52 AM, "Gabe Black" <[email protected]> wrote: > I'd put this up for a review a while ago but never heard anything. I > just updated it to fit with the current version of the source, and > that > affected a change Geoff Blake had made on May 23rd. It would be a good > idea for you ARM folks to look at this and make sure I didn't unfix > what > Geoff was fixing with that change. > > It's been a while, but I believe this change was necessary for > X86_FS on > O3. I have one other old review I'm going to update (support for > memory > mapped control registers) and then I'll give it another shot. Maybe > the > change I made recently that fixed the store microops dropping faults > got > it going? That may just be wishful thinking, but I have to imagine > it's > close to working. > > Gabe > > On 07/03/11 02:44, Gabe Black wrote: >> ----------------------------------------------------------- >> This is an automatically generated e-mail. To reply, visit: >> http://reviews.m5sim.org/r/501/ >> ----------------------------------------------------------- >> >> (Updated 2011-07-03 02:44:45.024096) >> >> >> Review request for Default, Ali Saidi, Gabe Black, Steve Reinhardt, >> and Nathan Binkert. >> >> >> Summary >> ------- >> >> O3: Fix corner case squashing into the microcode ROM. >> >> When fetching from the microcode ROM, if the PC is set so that it >> isn't in the >> cache block that's been fetched the CPU will get stuck. The fetch >> stage >> notices that it's in the ROM so it doesn't try to fetch from the >> current PC. >> It then later notices that it's outside of the current cache block >> so it skips >> generating instructions expecting to continue once the right bytes >> have been >> fetched. This change lets the fetch stage attempt to generate >> instructions, >> and only checks if the bytes it's going to use are valid if it's >> really going >> to use them. >> >> >> Diffs (updated) >> ----- >> >> src/cpu/o3/fetch_impl.hh 1b4b9c05ad2b >> >> Diff: http://reviews.m5sim.org/r/501/diff >> >> >> Testing >> ------- >> >> >> Thanks, >> >> Gabe >> >> _______________________________________________ >> gem5-dev mailing list >> [email protected] >> http://m5sim.org/mailman/listinfo/gem5-dev > > _______________________________________________ > gem5-dev mailing list > [email protected] > http://m5sim.org/mailman/listinfo/gem5-dev > -- IMPORTANT NOTICE: The contents of this email and any attachments are confidential and may also be privileged. If you are not the intended recipient, please notify the sender immediately and do not disclose the contents to any other person, use it for any purpose, or store or copy the information in any medium. Thank you. _______________________________________________ gem5-dev mailing list [email protected] http://m5sim.org/mailman/listinfo/gem5-dev
