Hey Nilay, That did the trick! You should be clear to check it in. Thanks for taking a look, and enjoy the 4th! Joel
On Sun, Jul 3, 2011 at 3:35 PM, Nilay Vaish <[email protected]> wrote: > On Sat, 2 Jul 2011, Joel Hestness wrote: > > Hey Nilay and Brad, >> >> @Nilay: Thanks for checking in the missing files. >> >> I'm still running into trouble with this set of patches. After >> compiling, >> if I try to run a simulation with Ruby (MOESI_hammer protocol), I get an >> error that a parameter in the DMA Sequencer isn't set: >> >> ------------------------------**------------------ >> joel@vein:~/research/m5/gem5$ ./build/X86_FS/gem5.opt >> configs/example/ruby_fs.py >> gem5 Simulator System. http://gem5.org >> gem5 is copyrighted software; use the --copyright option for details. >> >> gem5 compiled Jul 2 2011 13:33:32 >> gem5 started Jul 2 2011 13:39:23 >> gem5 executing on vein >> command line: ./build/X86_FS/gem5.opt configs/example/ruby_fs.py >> warning: add_child('terminal'): child 'terminal' already has parent >> Global frequency set at 1000000000000 ticks per second >> info: kernel located at: >> /home/joel/research/m5/disk_**images/binaries/x86_64-** >> vmlinux-2.6.28.4-smp >> fatal: system.dma_cntrl0.dma_**sequencer.ruby_system without default or >> user >> set value >> Segmentation fault >> > > Joel, check if the following changes resolve the problem that you are > currently facing. > > --- a/configs/ruby/MOESI_hammer.py > +++ b/configs/ruby/MOESI_hammer.py > @@ -200,11 +200,13 @@ > # > dma_seq = DMASequencer(version = i, > > physMemPort = system.physmem.port, > - physmem = system.physmem) > + physmem = system.physmem, > + ruby_system = ruby_system) > > dma_cntrl = DMA_Controller(version = i, > cntrl_id = cntrl_count, > - dma_sequencer = dma_seq) > + dma_sequencer = dma_seq, > + ruby_system = ruby_system) > > exec("system.dma_cntrl%d = dma_cntrl" % i) > if dma_device.type == 'MemTest': > > > > -- > Nilay > ______________________________**_________________ > gem5-dev mailing list > [email protected] > http://m5sim.org/mailman/**listinfo/gem5-dev<http://m5sim.org/mailman/listinfo/gem5-dev> > -- Joel Hestness PhD Student, Computer Architecture Dept. of Computer Science, University of Texas - Austin http://www.cs.utexas.edu/~hestness _______________________________________________ gem5-dev mailing list [email protected] http://m5sim.org/mailman/listinfo/gem5-dev
