Hey guys. I'm making progress on X86_FS O3, and now I'm hitting this weird assert:
gem5.opt: build/X86_FS/cpu/o3/fetch_impl.hh:118: bool DefaultFetch<Impl>::IcachePort::recvTiming(Packet*) [with Impl = O3CPUImpl]: Assertion `!(pkt->memInhibitAsserted() && !pkt->sharedAsserted())' failed. Any idea what it's checking and/or why that's getting triggered? I'm pretty sure I've only got one CPU so it shouldn't be shared, right? Maybe its ending up shared between the CPU and the page table walker? Why is instruction memory being shared a bad thing? Gabe _______________________________________________ gem5-dev mailing list [email protected] http://m5sim.org/mailman/listinfo/gem5-dev
