changeset 510879e6bea2 in /z/repo/gem5
details: http://repo.gem5.org/gem5?cmd=changeset;node=510879e6bea2
description:
ARM: Fix mp interrupt bug in GIC.
Missing "!" made multiprocessor interrupts operate incorrectly.
diffstat:
src/dev/arm/gic.cc | 2 +-
1 files changed, 1 insertions(+), 1 deletions(-)
diffs (12 lines):
diff -r 7907b19fbe80 -r 510879e6bea2 src/dev/arm/gic.cc
--- a/src/dev/arm/gic.cc Thu Jul 07 21:32:49 2011 -0400
+++ b/src/dev/arm/gic.cc Sun Jul 10 12:56:08 2011 -0500
@@ -564,7 +564,7 @@
*/
if ((bits(intEnabled[x], y) & bits(pendingInt[x], y)) &&
(intPriority[int_nm] < highest_pri))
- if (mp_sys || (cpuTarget[int_nm] & (1 << cpu))) {
+ if ( (!mp_sys) || (cpuTarget[int_nm] & (1 << cpu))) {
highest_pri = intPriority[int_nm];
highest_int = int_nm;
}
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