----------------------------------------------------------- This is an automatically generated e-mail. To reply, visit: http://reviews.m5sim.org/r/721/#review1409 -----------------------------------------------------------
Ship it! This looks good... I was pleasantly surprised how little code there was. It would be nice to get away with fewer #ifdefs, but I don't see an easy way around that. The one change I suggest is to protect all this with '#if TRACING_ON' instead of '#ifndef NDEBUG'. (Note that TRACING_ON is always defined as either 0 or 1, so use #if rather than #ifdef.) I think that's more consistent with the fact that you're using DPRINTF to spit out the trace records. Technically if you do this you wouldn't need a #if around any DPRINTFs. src/cpu/o3/commit_impl.hh <http://reviews.m5sim.org/r/721/#comment1844> Do we really need to save retireTick in a variable since we're just going to print it out a few lines later and then not use it again? The side benefit is that you could get rid of the #ifndef completely if you switch to using TRACING_ON instead of NDEBUG since everything else is a DPRINTF. src/cpu/o3/dyn_inst.hh <http://reviews.m5sim.org/r/721/#comment1843> This should be NDEBUG (unless you change to use TRACING_ON). - Steve On 2011-05-26 19:19:08, Ali Saidi wrote: > > ----------------------------------------------------------- > This is an automatically generated e-mail. To reply, visit: > http://reviews.m5sim.org/r/721/ > ----------------------------------------------------------- > > (Updated 2011-05-26 19:19:08) > > > Review request for Default, Ali Saidi, Gabe Black, Steve Reinhardt, and > Nathan Binkert. > > > Summary > ------- > > O3: Create a pipeline activity viewer for the O3 CPU model. > > Implement a pipeline activity viewer as a python script (util/o3-pipeview.py) > and modified O3 code base to support an extra trace flag (O3PipeView) for > generating traces to be used as inputs by the tool. > > > Diffs > ----- > > src/cpu/SConscript 3f37cc5d25bc > src/cpu/o3/commit_impl.hh 3f37cc5d25bc > src/cpu/o3/decode_impl.hh 3f37cc5d25bc > src/cpu/o3/dyn_inst.hh 3f37cc5d25bc > src/cpu/o3/fetch_impl.hh 3f37cc5d25bc > src/cpu/o3/iew_impl.hh 3f37cc5d25bc > src/cpu/o3/inst_queue_impl.hh 3f37cc5d25bc > src/cpu/o3/rename_impl.hh 3f37cc5d25bc > util/o3-pipeview.py PRE-CREATION > > Diff: http://reviews.m5sim.org/r/721/diff > > > Testing > ------- > > > Thanks, > > Ali > > _______________________________________________ gem5-dev mailing list [email protected] http://m5sim.org/mailman/listinfo/gem5-dev
