changeset e68b1ad09c6b in /z/repo/gem5
details: http://repo.gem5.org/gem5?cmd=changeset;node=e68b1ad09c6b
description:
O3: Fix corner case squashing into the microcode ROM.
When fetching from the microcode ROM, if the PC is set so that it isn't
in the
cache block that's been fetched the CPU will get stuck. The fetch stage
notices that it's in the ROM so it doesn't try to fetch from the
current PC.
It then later notices that it's outside of the current cache block so
it skips
generating instructions expecting to continue once the right bytes have
been
fetched. This change lets the fetch stage attempt to generate
instructions,
and only checks if the bytes it's going to use are valid if it's really
going
to use them.
diffstat:
src/cpu/o3/fetch_impl.hh | 20 ++++++++++++++------
1 files changed, 14 insertions(+), 6 deletions(-)
diffs (32 lines):
diff -r 435179113834 -r e68b1ad09c6b src/cpu/o3/fetch_impl.hh
--- a/src/cpu/o3/fetch_impl.hh Wed Jul 27 20:20:53 2011 -0500
+++ b/src/cpu/o3/fetch_impl.hh Sat Jul 30 23:22:53 2011 -0700
@@ -1238,14 +1238,22 @@
unsigned blkOffset = (fetchAddr - cacheDataPC[tid]) / instSize;
// Loop through instruction memory from the cache.
- // Keep issuing while we have not reached the end of the block or a
- // macroop is active and fetchWidth is available and branch is not
+ // Keep issuing while fetchWidth is available and branch is not
// predicted taken
- while ((blkOffset < numInsts || curMacroop) &&
- numInst < fetchWidth && !predictedBranch) {
+ while (numInst < fetchWidth && !predictedBranch) {
- // If we need to process more memory, do it now.
- if (!(curMacroop || inRom) && !predecoder.extMachInstReady()) {
+ // We need to process more memory if we aren't going to get a
+ // StaticInst from the rom, the current macroop, or what's already
+ // in the predecoder.
+ bool needMem = !inRom && !curMacroop && !predecoder.extMachInstReady();
+
+ if (needMem) {
+ if (blkOffset >= numInsts) {
+ // We need to process more memory, but we've run out of the
+ // current block.
+ break;
+ }
+
if (ISA_HAS_DELAY_SLOT && pcOffset == 0) {
// Walk past any annulled delay slot instructions.
Addr pcAddr = thisPC.instAddr() & BaseCPU::PCMask;
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