changeset c4e77a9563f5 in /z/repo/gem5
details: http://repo.gem5.org/gem5?cmd=changeset;node=c4e77a9563f5
description:
Translation: Use a pointer type as the template argument.
This allows regular pointers and reference counted pointers without
having to
use any shim structures or other tricks.
diffstat:
src/cpu/base_dyn_inst.hh | 13 +++++++------
src/cpu/simple/timing.cc | 24 ++++++++++++------------
src/cpu/translation.hh | 8 ++++----
3 files changed, 23 insertions(+), 22 deletions(-)
diffs (119 lines):
diff -r 7a9a7f2a3d46 -r c4e77a9563f5 src/cpu/base_dyn_inst.hh
--- a/src/cpu/base_dyn_inst.hh Wed Aug 03 18:25:30 2011 -0500
+++ b/src/cpu/base_dyn_inst.hh Sun Aug 07 09:21:48 2011 -0700
@@ -91,6 +91,7 @@
// The DynInstPtr type.
typedef typename Impl::DynInstPtr DynInstPtr;
+ typedef RefCountingPtr<BaseDynInst<Impl> > BaseDynInstPtr;
// The list of instructions iterator type.
typedef typename std::list<DynInstPtr>::iterator ListIt;
@@ -950,8 +951,8 @@
new WholeTranslationState(req, NULL, res, mode);
// One translation if the request isn't split.
- DataTranslation<BaseDynInst<Impl> > *trans =
- new DataTranslation<BaseDynInst<Impl> >(this, state);
+ DataTranslation<BaseDynInstPtr> *trans =
+ new DataTranslation<BaseDynInstPtr>(this, state);
cpu->dtb->translateTiming(req, thread->getTC(), trans, mode);
if (!translationCompleted) {
// Save memory requests.
@@ -964,10 +965,10 @@
new WholeTranslationState(req, sreqLow, sreqHigh, NULL, res, mode);
// Two translations when the request is split.
- DataTranslation<BaseDynInst<Impl> > *stransLow =
- new DataTranslation<BaseDynInst<Impl> >(this, state, 0);
- DataTranslation<BaseDynInst<Impl> > *stransHigh =
- new DataTranslation<BaseDynInst<Impl> >(this, state, 1);
+ DataTranslation<BaseDynInstPtr> *stransLow =
+ new DataTranslation<BaseDynInstPtr>(this, state, 0);
+ DataTranslation<BaseDynInstPtr> *stransHigh =
+ new DataTranslation<BaseDynInstPtr>(this, state, 1);
cpu->dtb->translateTiming(sreqLow, thread->getTC(), stransLow, mode);
cpu->dtb->translateTiming(sreqHigh, thread->getTC(), stransHigh, mode);
diff -r 7a9a7f2a3d46 -r c4e77a9563f5 src/cpu/simple/timing.cc
--- a/src/cpu/simple/timing.cc Wed Aug 03 18:25:30 2011 -0500
+++ b/src/cpu/simple/timing.cc Sun Aug 07 09:21:48 2011 -0700
@@ -461,18 +461,18 @@
WholeTranslationState *state =
new WholeTranslationState(req, req1, req2, new uint8_t[size],
NULL, mode);
- DataTranslation<TimingSimpleCPU> *trans1 =
- new DataTranslation<TimingSimpleCPU>(this, state, 0);
- DataTranslation<TimingSimpleCPU> *trans2 =
- new DataTranslation<TimingSimpleCPU>(this, state, 1);
+ DataTranslation<TimingSimpleCPU *> *trans1 =
+ new DataTranslation<TimingSimpleCPU *>(this, state, 0);
+ DataTranslation<TimingSimpleCPU *> *trans2 =
+ new DataTranslation<TimingSimpleCPU *>(this, state, 1);
thread->dtb->translateTiming(req1, tc, trans1, mode);
thread->dtb->translateTiming(req2, tc, trans2, mode);
} else {
WholeTranslationState *state =
new WholeTranslationState(req, new uint8_t[size], NULL, mode);
- DataTranslation<TimingSimpleCPU> *translation
- = new DataTranslation<TimingSimpleCPU>(this, state);
+ DataTranslation<TimingSimpleCPU *> *translation
+ = new DataTranslation<TimingSimpleCPU *>(this, state);
thread->dtb->translateTiming(req, tc, translation, mode);
}
@@ -530,18 +530,18 @@
WholeTranslationState *state =
new WholeTranslationState(req, req1, req2, newData, res, mode);
- DataTranslation<TimingSimpleCPU> *trans1 =
- new DataTranslation<TimingSimpleCPU>(this, state, 0);
- DataTranslation<TimingSimpleCPU> *trans2 =
- new DataTranslation<TimingSimpleCPU>(this, state, 1);
+ DataTranslation<TimingSimpleCPU *> *trans1 =
+ new DataTranslation<TimingSimpleCPU *>(this, state, 0);
+ DataTranslation<TimingSimpleCPU *> *trans2 =
+ new DataTranslation<TimingSimpleCPU *>(this, state, 1);
thread->dtb->translateTiming(req1, tc, trans1, mode);
thread->dtb->translateTiming(req2, tc, trans2, mode);
} else {
WholeTranslationState *state =
new WholeTranslationState(req, newData, res, mode);
- DataTranslation<TimingSimpleCPU> *translation =
- new DataTranslation<TimingSimpleCPU>(this, state);
+ DataTranslation<TimingSimpleCPU *> *translation =
+ new DataTranslation<TimingSimpleCPU *>(this, state);
thread->dtb->translateTiming(req, tc, translation, mode);
}
diff -r 7a9a7f2a3d46 -r c4e77a9563f5 src/cpu/translation.hh
--- a/src/cpu/translation.hh Wed Aug 03 18:25:30 2011 -0500
+++ b/src/cpu/translation.hh Sun Aug 07 09:21:48 2011 -0700
@@ -214,21 +214,21 @@
* translation state class indicate that the whole translation is complete
* then the execution context is informed.
*/
-template <class ExecContext>
+template <class ExecContextPtr>
class DataTranslation : public BaseTLB::Translation
{
protected:
- ExecContext *xc;
+ ExecContextPtr xc;
WholeTranslationState *state;
int index;
public:
- DataTranslation(ExecContext *_xc, WholeTranslationState* _state)
+ DataTranslation(ExecContextPtr _xc, WholeTranslationState* _state)
: xc(_xc), state(_state), index(0)
{
}
- DataTranslation(ExecContext *_xc, WholeTranslationState* _state,
+ DataTranslation(ExecContextPtr _xc, WholeTranslationState* _state,
int _index)
: xc(_xc), state(_state), index(_index)
{
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