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Review request for Default, Ali Saidi, Gabe Black, Steve Reinhardt, and Nathan Binkert. Summary ------- GCC: Get everything working with gcc 4.6.1. And by "everything" I mean all the quick regressions. Diffs ----- src/SConscript 1f95c9a0bb2f src/arch/alpha/ev5.cc 1f95c9a0bb2f src/arch/alpha/isa/decoder.isa 1f95c9a0bb2f src/arch/alpha/isa/mem.isa 1f95c9a0bb2f src/arch/arm/isa/formats/fp.isa 1f95c9a0bb2f src/arch/arm/isa/insts/fp.isa 1f95c9a0bb2f src/arch/arm/isa/insts/m5ops.isa 1f95c9a0bb2f src/arch/arm/isa/insts/macromem.isa 1f95c9a0bb2f src/arch/arm/isa/insts/neon.isa 1f95c9a0bb2f src/arch/arm/isa/templates/mem.isa 1f95c9a0bb2f src/arch/mips/isa/decoder.isa 1f95c9a0bb2f src/arch/mips/isa/formats/control.isa 1f95c9a0bb2f src/arch/mips/isa/formats/mt.isa 1f95c9a0bb2f src/arch/mips/isa/includes.isa 1f95c9a0bb2f src/arch/mips/tlb.cc 1f95c9a0bb2f src/arch/power/isa/formats/mem.isa 1f95c9a0bb2f src/arch/power/tlb.cc 1f95c9a0bb2f src/arch/sparc/isa/formats/mem/util.isa 1f95c9a0bb2f src/arch/x86/isa/microops/base.isa 1f95c9a0bb2f src/base/inet.cc 1f95c9a0bb2f src/cpu/base.cc 1f95c9a0bb2f src/cpu/inorder/cpu.cc 1f95c9a0bb2f src/cpu/legiontrace.cc 1f95c9a0bb2f src/cpu/o3/cpu.cc 1f95c9a0bb2f src/cpu/o3/rename_impl.hh 1f95c9a0bb2f src/mem/cache/tags/iic.cc 1f95c9a0bb2f src/mem/ruby/network/orion/Clock.cc 1f95c9a0bb2f src/mem/ruby/system/PersistentTable.hh 1f95c9a0bb2f src/mem/ruby/system/PseudoLRUPolicy.hh 1f95c9a0bb2f src/python/m5/params.py 1f95c9a0bb2f src/python/swig/pyobject.cc 1f95c9a0bb2f src/sim/pseudo_inst.hh 1f95c9a0bb2f Diff: http://reviews.m5sim.org/r/843/diff Testing ------- Thanks, Gabe _______________________________________________ gem5-dev mailing list [email protected] http://m5sim.org/mailman/listinfo/gem5-dev
