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Ship it! Didn't really try and follow the logic closely, but superficially it looks fine to me. src/cpu/inorder/resources/bpred_unit.hh <http://reviews.m5sim.org/r/830/#comment2036> should be "or" not "on" - Steve On 2011-08-19 15:28:55, Ali Saidi wrote: > > ----------------------------------------------------------- > This is an automatically generated e-mail. To reply, visit: > http://reviews.m5sim.org/r/830/ > ----------------------------------------------------------- > > (Updated 2011-08-19 15:28:55) > > > Review request for Default, Ali Saidi, Gabe Black, Steve Reinhardt, and > Nathan Binkert. > > > Summary > ------- > > BP: Fix several Branch Predictor issues. > 1. Updates the Branch Predictor correctly to the state > just after a mispredicted branch, if a squash occurs. > 2. If a BTB does not find an entry, the branch is predicted not taken. > The global history is modified to correctly reflect this prediction. > 3. Local history is now updated at the fetch stage instead of > execute stage. > 4. In the Update stage of the branch predictor the local predictors are > now correctly updated according to the state of local history during > fetch stage. > > This patch also improves performance by as much as 17% on some benchmarks > > > Diffs > ----- > > src/cpu/inorder/resources/bpred_unit.hh 1f95c9a0bb2f > src/cpu/inorder/resources/bpred_unit.cc 1f95c9a0bb2f > src/cpu/o3/bpred_unit.hh 1f95c9a0bb2f > src/cpu/o3/bpred_unit_impl.hh 1f95c9a0bb2f > src/cpu/o3/commit_impl.hh 1f95c9a0bb2f > src/cpu/o3/decode_impl.hh 1f95c9a0bb2f > src/cpu/pred/2bit_local.hh 1f95c9a0bb2f > src/cpu/pred/2bit_local.cc 1f95c9a0bb2f > src/cpu/pred/tournament.hh 1f95c9a0bb2f > src/cpu/pred/tournament.cc 1f95c9a0bb2f > > Diff: http://reviews.m5sim.org/r/830/diff > > > Testing > ------- > > > Thanks, > > Ali > > _______________________________________________ gem5-dev mailing list [email protected] http://m5sim.org/mailman/listinfo/gem5-dev
