changeset f44572edfba3 in /z/repo/gem5
details: http://repo.gem5.org/gem5?cmd=changeset;node=f44572edfba3
description:
        Syscall: Make the syscall function available in both SE and FS modes.

        In FS mode the syscall function will panic, but the interface will be
        consistent and code which calls syscall can be compiled in. This will 
allow,
        for instance, instructions that use syscall to be built unconditionally 
but
        then not returned by the decoder.

diffstat:

 src/cpu/inorder/inorder_dyn_inst.cc |   8 ++++++--
 src/cpu/inorder/inorder_dyn_inst.hh |   4 ++--
 src/cpu/o3/dyn_inst.hh              |   6 +++---
 src/cpu/o3/dyn_inst_impl.hh         |   8 ++++++--
 src/cpu/simple/base.hh              |  10 +++++++++-
 5 files changed, 26 insertions(+), 10 deletions(-)

diffs (107 lines):

diff -r 2afd82e84d95 -r f44572edfba3 src/cpu/inorder/inorder_dyn_inst.cc
--- a/src/cpu/inorder/inorder_dyn_inst.cc       Mon Sep 19 02:40:19 2011 -0700
+++ b/src/cpu/inorder/inorder_dyn_inst.cc       Mon Sep 19 02:46:48 2011 -0700
@@ -311,14 +311,18 @@
 #endif
     return this->cpu->simPalCheck(palFunc, this->threadNumber);
 }
-#else
+#endif
+
 void
 InOrderDynInst::syscall(int64_t callnum)
 {
+#if FULL_SYSTEM
+    panic("Syscall emulation isn't available in FS mode.\n");
+#else
     syscallNum = callnum;
     cpu->syscallContext(NoFault, this->threadNumber, this);
+#endif
 }
-#endif
 
 void
 InOrderDynInst::setSquashInfo(unsigned stage_num)
diff -r 2afd82e84d95 -r f44572edfba3 src/cpu/inorder/inorder_dyn_inst.hh
--- a/src/cpu/inorder/inorder_dyn_inst.hh       Mon Sep 19 02:40:19 2011 -0700
+++ b/src/cpu/inorder/inorder_dyn_inst.hh       Mon Sep 19 02:46:48 2011 -0700
@@ -525,10 +525,10 @@
     bool simPalCheck(int palFunc);
 #else
     short syscallNum;
+#endif
 
-    /** Calls a syscall. */
+    /** Emulates a syscall. */
     void syscall(int64_t callnum);
-#endif
 
     ////////////////////////////////////////////////////////////
     //
diff -r 2afd82e84d95 -r f44572edfba3 src/cpu/o3/dyn_inst.hh
--- a/src/cpu/o3/dyn_inst.hh    Mon Sep 19 02:40:19 2011 -0700
+++ b/src/cpu/o3/dyn_inst.hh    Mon Sep 19 02:46:48 2011 -0700
@@ -205,10 +205,10 @@
     /** Traps to handle specified fault. */
     void trap(Fault fault);
     bool simPalCheck(int palFunc);
-#else
-    /** Calls a syscall. */
+#endif
+
+    /** Emulates a syscall. */
     void syscall(int64_t callnum);
-#endif
 
   public:
 
diff -r 2afd82e84d95 -r f44572edfba3 src/cpu/o3/dyn_inst_impl.hh
--- a/src/cpu/o3/dyn_inst_impl.hh       Mon Sep 19 02:40:19 2011 -0700
+++ b/src/cpu/o3/dyn_inst_impl.hh       Mon Sep 19 02:46:48 2011 -0700
@@ -188,11 +188,15 @@
 #endif
     return this->cpu->simPalCheck(palFunc, this->threadNumber);
 }
-#else
+#endif
+
 template <class Impl>
 void
 BaseO3DynInst<Impl>::syscall(int64_t callnum)
 {
+#if FULL_SYSTEM
+    panic("Syscall emulation isn't available in FS mode.\n");
+#else
     // HACK: check CPU's nextPC before and after syscall. If it
     // changes, update this instruction's nextPC because the syscall
     // must have changed the nextPC.
@@ -202,6 +206,6 @@
     if (!(curPC == newPC)) {
         this->pcState(newPC);
     }
+#endif
 }
-#endif
 
diff -r 2afd82e84d95 -r f44572edfba3 src/cpu/simple/base.hh
--- a/src/cpu/simple/base.hh    Mon Sep 19 02:40:19 2011 -0700
+++ b/src/cpu/simple/base.hh    Mon Sep 19 02:46:48 2011 -0700
@@ -402,9 +402,17 @@
 #if FULL_SYSTEM
     Fault hwrei() { return thread->hwrei(); }
     bool simPalCheck(int palFunc) { return thread->simPalCheck(palFunc); }
+#endif
+
+    void
+    syscall(int64_t callnum)
+    {
+#if FULL_SYSTEM
+        panic("Syscall emulation isn't available in FS mode.\n");
 #else
-    void syscall(int64_t callnum) { thread->syscall(callnum); }
+        thread->syscall(callnum);
 #endif
+    }
 
     bool misspeculating() { return thread->misspeculating(); }
     ThreadContext *tcBase() { return tc; }
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