changeset 8f23aeaf6a91 in /z/repo/gem5
details: http://repo.gem5.org/gem5?cmd=changeset;node=8f23aeaf6a91
description:
Faults: Replace calls to genMachineCheckFault with M5PanicFault.
diffstat:
src/arch/alpha/faults.hh | 5 -----
src/arch/alpha/tlb.cc | 11 +++++++----
src/arch/arm/faults.hh | 5 -----
src/arch/mips/faults.hh | 5 -----
src/arch/power/faults.hh | 7 -------
src/arch/sparc/faults.hh | 7 -------
src/arch/x86/faults.hh | 5 -----
src/cpu/o3/lsq_unit.hh | 5 ++++-
src/cpu/o3/lsq_unit_impl.hh | 10 ++++++++--
9 files changed, 19 insertions(+), 41 deletions(-)
diffs (185 lines):
diff -r aafd1d2e13e3 -r 8f23aeaf6a91 src/arch/alpha/faults.hh
--- a/src/arch/alpha/faults.hh Tue Sep 27 00:17:09 2011 -0700
+++ b/src/arch/alpha/faults.hh Tue Sep 27 00:24:43 2011 -0700
@@ -84,11 +84,6 @@
bool isAlignmentFault() const {return true;}
};
-static inline Fault genMachineCheckFault()
-{
- return new MachineCheckFault;
-}
-
class ResetFault : public AlphaFault
{
private:
diff -r aafd1d2e13e3 -r 8f23aeaf6a91 src/arch/alpha/tlb.cc
--- a/src/arch/alpha/tlb.cc Tue Sep 27 00:17:09 2011 -0700
+++ b/src/arch/alpha/tlb.cc Tue Sep 27 00:24:43 2011 -0700
@@ -36,6 +36,7 @@
#include "arch/alpha/faults.hh"
#include "arch/alpha/pagetable.hh"
#include "arch/alpha/tlb.hh"
+#include "arch/generic/debugfaults.hh"
#include "base/inifile.hh"
#include "base/str.hh"
#include "base/trace.hh"
@@ -434,8 +435,9 @@
}
// check that the physical address is ok (catch bad physical addresses)
- if (req->getPaddr() & ~PAddrImplMask)
- return genMachineCheckFault();
+ if (req->getPaddr() & ~PAddrImplMask) {
+ return new MachineCheckFault();
+ }
return checkCacheability(req, true);
@@ -562,8 +564,9 @@
}
// check that the physical address is ok (catch bad physical addresses)
- if (req->getPaddr() & ~PAddrImplMask)
- return genMachineCheckFault();
+ if (req->getPaddr() & ~PAddrImplMask) {
+ return new MachineCheckFault();
+ }
return checkCacheability(req);
}
diff -r aafd1d2e13e3 -r 8f23aeaf6a91 src/arch/arm/faults.hh
--- a/src/arch/arm/faults.hh Tue Sep 27 00:17:09 2011 -0700
+++ b/src/arch/arm/faults.hh Tue Sep 27 00:24:43 2011 -0700
@@ -242,11 +242,6 @@
StaticInstPtr inst = StaticInst::nullStaticInstPtr);
};
-static inline Fault genMachineCheckFault()
-{
- return new Reset();
-}
-
// A fault that flushes the pipe, excluding the faulting instructions
class ArmSev : public ArmFaultVals<ArmSev>
{
diff -r aafd1d2e13e3 -r 8f23aeaf6a91 src/arch/mips/faults.hh
--- a/src/arch/mips/faults.hh Tue Sep 27 00:17:09 2011 -0700
+++ b/src/arch/mips/faults.hh Tue Sep 27 00:24:43 2011 -0700
@@ -128,11 +128,6 @@
bool isMachineCheckFault() { return true; }
};
-static inline Fault genMachineCheckFault()
-{
- return new MachineCheckFault;
-}
-
class ResetFault : public MipsFault<ResetFault>
{
public:
diff -r aafd1d2e13e3 -r 8f23aeaf6a91 src/arch/power/faults.hh
--- a/src/arch/power/faults.hh Tue Sep 27 00:17:09 2011 -0700
+++ b/src/arch/power/faults.hh Tue Sep 27 00:24:43 2011 -0700
@@ -85,13 +85,6 @@
}
};
-
-static inline Fault
-genMachineCheckFault()
-{
- return new MachineCheckFault();
-}
-
} // namespace PowerISA
#endif // __ARCH_POWER_FAULTS_HH__
diff -r aafd1d2e13e3 -r 8f23aeaf6a91 src/arch/sparc/faults.hh
--- a/src/arch/sparc/faults.hh Tue Sep 27 00:17:09 2011 -0700
+++ b/src/arch/sparc/faults.hh Tue Sep 27 00:24:43 2011 -0700
@@ -287,13 +287,6 @@
#endif
};
-static inline Fault
-genMachineCheckFault()
-{
- return new InternalProcessorError;
-}
-
-
} // namespace SparcISA
#endif // __SPARC_FAULTS_HH__
diff -r aafd1d2e13e3 -r 8f23aeaf6a91 src/arch/x86/faults.hh
--- a/src/arch/x86/faults.hh Tue Sep 27 00:17:09 2011 -0700
+++ b/src/arch/x86/faults.hh Tue Sep 27 00:24:43 2011 -0700
@@ -363,11 +363,6 @@
{}
};
- static inline Fault genMachineCheckFault()
- {
- return new MachineCheck;
- }
-
class SIMDFloatingPointFault : public X86Fault
{
public:
diff -r aafd1d2e13e3 -r 8f23aeaf6a91 src/cpu/o3/lsq_unit.hh
--- a/src/cpu/o3/lsq_unit.hh Tue Sep 27 00:17:09 2011 -0700
+++ b/src/cpu/o3/lsq_unit.hh Tue Sep 27 00:24:43 2011 -0700
@@ -38,6 +38,7 @@
#include <queue>
#include "arch/faults.hh"
+#include "arch/generic/debugfaults.hh"
#include "arch/isa_traits.hh"
#include "arch/locked_mem.hh"
#include "arch/mmapped_ipr.hh"
@@ -568,7 +569,9 @@
delete sreqLow;
delete sreqHigh;
}
- return TheISA::genMachineCheckFault();
+ return new GenericISA::M5PanicFault(
+ "Uncachable load [sn:%llx] PC %s\n",
+ load_inst->seqNum, load_inst->pcState());
}
// Check the SQ for any previous stores that might lead to forwarding
diff -r aafd1d2e13e3 -r 8f23aeaf6a91 src/cpu/o3/lsq_unit_impl.hh
--- a/src/cpu/o3/lsq_unit_impl.hh Tue Sep 27 00:17:09 2011 -0700
+++ b/src/cpu/o3/lsq_unit_impl.hh Tue Sep 27 00:24:43 2011 -0700
@@ -41,6 +41,7 @@
* Korey Sewell
*/
+#include "arch/generic/debugfaults.hh"
#include "arch/locked_mem.hh"
#include "base/str.hh"
#include "config/the_isa.hh"
@@ -539,7 +540,10 @@
++lsqMemOrderViolation;
- return TheISA::genMachineCheckFault();
+ return new GenericISA::M5PanicFault(
+ "Detected fault with inst [sn:%lli] and "
+ "[sn:%lli] at address %#x\n",
+ inst->seqNum, ld_inst->seqNum, ld_eff_addr1);
}
}
@@ -563,7 +567,9 @@
++lsqMemOrderViolation;
- return TheISA::genMachineCheckFault();
+ return new GenericISA::M5PanicFault("Detected fault with "
+ "inst [sn:%lli] and [sn:%lli] at address %#x\n",
+ inst->seqNum, ld_inst->seqNum, ld_eff_addr1);
}
}
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