> On 2011-10-11 16:23:14, Nilay Vaish wrote: > > src/mem/slicc/symbols/StateMachine.py, line 502 > > <http://reviews.m5sim.org/r/893/diff/1/?file=15294#file15294line502> > > > > Lisa, this line does not appear in the current version of gem5. You may > > want to update your version before committing this change.
Thanks Nilay. I didn't bother to pop off all the internal patches before doing this review, but I will before pushing, if it gets past you :). > On 2011-10-11 16:23:14, Nilay Vaish wrote: > > src/mem/slicc/symbols/StateMachine.py, line 508 > > <http://reviews.m5sim.org/r/893/diff/1/?file=15294#file15294line508> > > > > Why do we have loop here? Can a controller be associated with multiple > > sequencers? Yes, it can. There's no inherent limit to being 1:1. - Lisa ----------------------------------------------------------- This is an automatically generated e-mail. To reply, visit: http://reviews.m5sim.org/r/893/#review1597 ----------------------------------------------------------- On 2011-10-11 13:23:04, Lisa Hsu wrote: > > ----------------------------------------------------------- > This is an automatically generated e-mail. To reply, visit: > http://reviews.m5sim.org/r/893/ > ----------------------------------------------------------- > > (Updated 2011-10-11 13:23:04) > > > Review request for Default, Ali Saidi, Gabe Black, Steve Reinhardt, and > Nathan Binkert. > > > Summary > ------- > > Ruby: Make it so that controllers attached to Sequencers don't have to be > named L1Cache. > > > Diffs > ----- > > src/mem/slicc/symbols/StateMachine.py 09745e0c3dd9 > > Diff: http://reviews.m5sim.org/r/893/diff > > > Testing > ------- > > > Thanks, > > Lisa > > _______________________________________________ gem5-dev mailing list [email protected] http://m5sim.org/mailman/listinfo/gem5-dev
