changeset 690417d95f6d in /z/repo/gem5
details: http://repo.gem5.org/gem5?cmd=changeset;node=690417d95f6d
description:
Merged with recent changes.
diffstat:
src/SConscript | 105 +++++---------
src/arch/alpha/linux/linux.hh | 1 +
src/arch/alpha/process.cc | 2 +-
src/arch/alpha/tru64/tru64.hh | 1 +
src/arch/arm/linux/linux.hh | 1 +
src/arch/arm/linux/process.cc | 2 +-
src/arch/arm/process.cc | 3 +-
src/arch/mips/linux/linux.hh | 1 +
src/arch/mips/process.cc | 2 +-
src/arch/power/linux/linux.hh | 1 +
src/arch/power/process.cc | 3 +-
src/arch/sparc/linux/linux.hh | 1 +
src/arch/sparc/process.cc | 3 +-
src/arch/sparc/solaris/solaris.hh | 1 +
src/arch/x86/linux/linux.hh | 2 +
src/arch/x86/process.cc | 9 +-
src/dev/io_device.cc | 28 +++
src/dev/io_device.hh | 32 +----
src/kern/tru64/tru64.hh | 4 +-
src/mem/page_table.cc | 45 +++--
src/mem/page_table.hh | 23 ++-
src/mem/translating_port.cc | 8 +-
src/python/SConscript | 1 +
src/python/m5/SimObject.py | 267 ++++++++++++++++++++++++-------------
src/python/m5/params.py | 32 +++-
src/python/swig/pyobject.i | 55 +++++++
src/python/swig/sim_object.i | 81 -----------
src/python/swig/system.i | 46 ------
src/sim/System.py | 11 +-
src/sim/process.cc | 14 +-
src/sim/process.hh | 2 +
src/sim/sim_object_params.hh | 58 --------
src/sim/syscall_emul.cc | 3 +-
src/sim/syscall_emul.hh | 55 +++++--
src/sim/system.cc | 4 +-
src/sim/system.hh | 4 +-
tests/SConscript | 4 +-
37 files changed, 466 insertions(+), 449 deletions(-)
diffs (truncated from 1613 to 300 lines):
diff -r 836f8fad4a4c -r 690417d95f6d src/SConscript
--- a/src/SConscript Fri Oct 28 13:00:35 2011 -0500
+++ b/src/SConscript Fri Oct 28 13:04:33 2011 -0500
@@ -449,7 +449,13 @@
sim_objects = m5.SimObject.allClasses
all_enums = m5.params.allEnums
-all_params = {}
+# Find param types that need to be explicitly wrapped with swig.
+# These will be recognized because the ParamDesc will have a
+# swig_decl() method. Most param types are based on types that don't
+# need this, either because they're based on native types (like Int)
+# or because they're SimObjects (which get swigged independently).
+# For now the only things handled here are VectorParam types.
+params_to_swig = {}
for name,obj in sorted(sim_objects.iteritems()):
for param in obj._params.local.values():
# load the ptype attribute now because it depends on the
@@ -461,8 +467,8 @@
if not hasattr(param, 'swig_decl'):
continue
pname = param.ptype_str
- if pname not in all_params:
- all_params[pname] = param
+ if pname not in params_to_swig:
+ params_to_swig[pname] = param
########################################################################
#
@@ -523,24 +529,23 @@
# Create all of the SimObject param headers and enum headers
#
-def createSimObjectParam(target, source, env):
+def createSimObjectParamStruct(target, source, env):
assert len(target) == 1 and len(source) == 1
name = str(source[0].get_contents())
obj = sim_objects[name]
code = code_formatter()
- obj.cxx_decl(code)
+ obj.cxx_param_decl(code)
code.write(target[0].abspath)
-def createSwigParam(target, source, env):
+def createParamSwigWrapper(target, source, env):
assert len(target) == 1 and len(source) == 1
name = str(source[0].get_contents())
- param = all_params[name]
+ param = params_to_swig[name]
code = code_formatter()
- code('%module(package="m5.internal") $0_${name}', param.file_ext)
param.swig_decl(code)
code.write(target[0].abspath)
@@ -554,7 +559,7 @@
obj.cxx_def(code)
code.write(target[0].abspath)
-def createEnumParam(target, source, env):
+def createEnumDecls(target, source, env):
assert len(target) == 1 and len(source) == 1
name = str(source[0].get_contents())
@@ -564,25 +569,25 @@
obj.cxx_decl(code)
code.write(target[0].abspath)
-def createEnumSwig(target, source, env):
+def createEnumSwigWrapper(target, source, env):
assert len(target) == 1 and len(source) == 1
name = str(source[0].get_contents())
obj = all_enums[name]
code = code_formatter()
- code('''\
-%module(package="m5.internal") enum_$name
-
-%{
-#include "enums/$name.hh"
-%}
-
-%include "enums/$name.hh"
-''')
+ obj.swig_decl(code)
code.write(target[0].abspath)
-# Generate all of the SimObject param struct header files
+def createSimObjectSwigWrapper(target, source, env):
+ name = source[0].get_contents()
+ obj = sim_objects[name]
+
+ code = code_formatter()
+ obj.swig_decl(code)
+ code.write(target[0].abspath)
+
+# Generate all of the SimObject param C++ struct header files
params_hh_files = []
for name,simobj in sorted(sim_objects.iteritems()):
py_source = PySource.modules[simobj.__module__]
@@ -591,16 +596,16 @@
hh_file = File('params/%s.hh' % name)
params_hh_files.append(hh_file)
env.Command(hh_file, Value(name),
- MakeAction(createSimObjectParam, Transform("SO PARAM")))
+ MakeAction(createSimObjectParamStruct, Transform("SO PARAM")))
env.Depends(hh_file, depends + extra_deps)
-# Generate any parameter header files needed
+# Generate any needed param SWIG wrapper files
params_i_files = []
-for name,param in all_params.iteritems():
- i_file = File('python/m5/internal/%s_%s.i' % (param.file_ext, name))
+for name,param in params_to_swig.iteritems():
+ i_file = File('python/m5/internal/%s.i' % (param.swig_module_name()))
params_i_files.append(i_file)
env.Command(i_file, Value(name),
- MakeAction(createSwigParam, Transform("SW PARAM")))
+ MakeAction(createParamSwigWrapper, Transform("SW PARAM")))
env.Depends(i_file, depends)
SwigSource('m5.internal', i_file)
@@ -617,54 +622,22 @@
hh_file = File('enums/%s.hh' % name)
env.Command(hh_file, Value(name),
- MakeAction(createEnumParam, Transform("EN PARAM")))
+ MakeAction(createEnumDecls, Transform("ENUMDECL")))
env.Depends(hh_file, depends + extra_deps)
i_file = File('python/m5/internal/enum_%s.i' % name)
env.Command(i_file, Value(name),
- MakeAction(createEnumSwig, Transform("ENUMSWIG")))
+ MakeAction(createEnumSwigWrapper, Transform("ENUMSWIG")))
env.Depends(i_file, depends + extra_deps)
SwigSource('m5.internal', i_file)
-def buildParam(target, source, env):
- name = source[0].get_contents()
- obj = sim_objects[name]
- class_path = obj.cxx_class.split('::')
- classname = class_path[-1]
- namespaces = class_path[:-1]
- params = obj._params.local.values()
-
- code = code_formatter()
-
- code('%module(package="m5.internal") param_$name')
- code()
- code('%{')
- code('#include "params/$obj.hh"')
- for param in params:
- param.cxx_predecls(code)
- code('%}')
- code()
-
- for param in params:
- param.swig_predecls(code)
-
- code()
- if obj._base:
- code('%import "python/m5/internal/param_${{obj._base}}.i"')
- code()
- obj.swig_objdecls(code)
- code()
-
- code('%include "params/$obj.hh"')
-
- code.write(target[0].abspath)
-
+# Generate SimObject SWIG wrapper files
for name in sim_objects.iterkeys():
- params_file = File('python/m5/internal/param_%s.i' % name)
- env.Command(params_file, Value(name),
- MakeAction(buildParam, Transform("BLDPARAM")))
- env.Depends(params_file, depends)
- SwigSource('m5.internal', params_file)
+ i_file = File('python/m5/internal/param_%s.i' % name)
+ env.Command(i_file, Value(name),
+ MakeAction(createSimObjectSwigWrapper, Transform("SO SWIG")))
+ env.Depends(i_file, depends)
+ SwigSource('m5.internal', i_file)
# Generate the main swig init file
def makeEmbeddedSwigInit(target, source, env):
@@ -687,7 +660,7 @@
MakeAction('$SWIG $SWIGFLAGS -outdir ${TARGETS[1].dir} '
'-o ${TARGETS[0]} $SOURCES', Transform("SWIG")))
cc_file = str(swig.tnode)
- init_file = '%s/init_%s.cc' % (dirname(cc_file), basename(cc_file))
+ init_file = '%s/%s_init.cc' % (dirname(cc_file), basename(cc_file))
env.Command(init_file, Value(swig.module),
MakeAction(makeEmbeddedSwigInit, Transform("EMBED SW")))
Source(init_file, **swig.guards)
diff -r 836f8fad4a4c -r 690417d95f6d src/arch/alpha/linux/linux.hh
--- a/src/arch/alpha/linux/linux.hh Fri Oct 28 13:00:35 2011 -0500
+++ b/src/arch/alpha/linux/linux.hh Fri Oct 28 13:04:33 2011 -0500
@@ -69,6 +69,7 @@
/// For mmap().
static const unsigned TGT_MAP_ANONYMOUS = 0x10;
+ static const unsigned TGT_MAP_FIXED = 0x100;
//@{
/// For getsysinfo().
diff -r 836f8fad4a4c -r 690417d95f6d src/arch/alpha/process.cc
--- a/src/arch/alpha/process.cc Fri Oct 28 13:00:35 2011 -0500
+++ b/src/arch/alpha/process.cc Fri Oct 28 13:04:33 2011 -0500
@@ -126,7 +126,7 @@
stack_min = roundDown(stack_min, pageSize);
stack_size = stack_base - stack_min;
// map memory
- pTable->allocate(stack_min, roundUp(stack_size, pageSize));
+ allocateMem(stack_min, roundUp(stack_size, pageSize));
// map out initial stack contents
Addr argv_array_base = stack_min + intSize; // room for argc
diff -r 836f8fad4a4c -r 690417d95f6d src/arch/alpha/tru64/tru64.hh
--- a/src/arch/alpha/tru64/tru64.hh Fri Oct 28 13:00:35 2011 -0500
+++ b/src/arch/alpha/tru64/tru64.hh Fri Oct 28 13:04:33 2011 -0500
@@ -64,6 +64,7 @@
/// For mmap().
static const unsigned TGT_MAP_ANONYMOUS = 0x10;
+ static const unsigned TGT_MAP_FIXED = 0x100;
//@{
/// For getsysinfo().
diff -r 836f8fad4a4c -r 690417d95f6d src/arch/arm/linux/linux.hh
--- a/src/arch/arm/linux/linux.hh Fri Oct 28 13:00:35 2011 -0500
+++ b/src/arch/arm/linux/linux.hh Fri Oct 28 13:04:33 2011 -0500
@@ -91,6 +91,7 @@
/// For mmap().
static const unsigned TGT_MAP_ANONYMOUS = 0x20;
+ static const unsigned TGT_MAP_FIXED = 0x10;
//@{
/// For getrusage().
diff -r 836f8fad4a4c -r 690417d95f6d src/arch/arm/linux/process.cc
--- a/src/arch/arm/linux/process.cc Fri Oct 28 13:00:35 2011 -0500
+++ b/src/arch/arm/linux/process.cc Fri Oct 28 13:04:33 2011 -0500
@@ -503,7 +503,7 @@
ArmLinuxProcess::initState()
{
ArmLiveProcess::initState();
- pTable->allocate(commPage, PageBytes);
+ allocateMem(commPage, PageBytes);
ThreadContext *tc = system->getThreadContext(contextIds[0]);
uint8_t swiNeg1[] = {
diff -r 836f8fad4a4c -r 690417d95f6d src/arch/arm/process.cc
--- a/src/arch/arm/process.cc Fri Oct 28 13:00:35 2011 -0500
+++ b/src/arch/arm/process.cc Fri Oct 28 13:04:33 2011 -0500
@@ -251,8 +251,7 @@
stack_size = stack_base - stack_min;
// map memory
- pTable->allocate(roundDown(stack_min, pageSize),
- roundUp(stack_size, pageSize));
+ allocateMem(roundDown(stack_min, pageSize), roundUp(stack_size, pageSize));
// map out initial stack contents
uint32_t sentry_base = stack_base - sentry_size;
diff -r 836f8fad4a4c -r 690417d95f6d src/arch/mips/linux/linux.hh
--- a/src/arch/mips/linux/linux.hh Fri Oct 28 13:00:35 2011 -0500
+++ b/src/arch/mips/linux/linux.hh Fri Oct 28 13:04:33 2011 -0500
@@ -65,6 +65,7 @@
/// For mmap().
static const unsigned TGT_MAP_ANONYMOUS = 0x800;
+ static const unsigned TGT_MAP_FIXED = 0x10;
//@{
/// For getsysinfo().
diff -r 836f8fad4a4c -r 690417d95f6d src/arch/mips/process.cc
--- a/src/arch/mips/process.cc Fri Oct 28 13:00:35 2011 -0500
+++ b/src/arch/mips/process.cc Fri Oct 28 13:04:33 2011 -0500
@@ -136,7 +136,7 @@
stack_min = roundDown(stack_min, pageSize);
stack_size = stack_base - stack_min;
// map memory
- pTable->allocate(stack_min, roundUp(stack_size, pageSize));
+ allocateMem(stack_min, roundUp(stack_size, pageSize));
// map out initial stack contents
IntType argv_array_base = stack_min + intSize; // room for argc
diff -r 836f8fad4a4c -r 690417d95f6d src/arch/power/linux/linux.hh
--- a/src/arch/power/linux/linux.hh Fri Oct 28 13:00:35 2011 -0500
+++ b/src/arch/power/linux/linux.hh Fri Oct 28 13:04:33 2011 -0500
@@ -127,6 +127,7 @@
/// For mmap().
static const unsigned TGT_MAP_ANONYMOUS = 0x20;
+ static const unsigned TGT_MAP_FIXED = 0x10;
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