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Review request for Default. Summary ------- MEM: Simplify ports by removing EventManager This patch removes the inheritance of EventManager from the ports and moves all responsibility for event queues to the owner. Eventually the event manager should be the interface block, which could either be the structural owner or a subblock like a LSQ in the O3 CPU for example. Diffs ----- src/cpu/simple/timing.cc ca98021c3f96 src/dev/io_device.cc ca98021c3f96 src/mem/bridge.cc ca98021c3f96 src/mem/cache/base.cc ca98021c3f96 src/mem/cache/cache_impl.hh ca98021c3f96 src/mem/port.hh ca98021c3f96 src/mem/port.cc ca98021c3f96 src/mem/tport.hh ca98021c3f96 src/mem/tport.cc ca98021c3f96 Diff: http://reviews.m5sim.org/r/945/diff Testing ------- util/regress all passing (disregarding t1000 and eio) Thanks, Andreas _______________________________________________ gem5-dev mailing list [email protected] http://m5sim.org/mailman/listinfo/gem5-dev
