On Mon, Jan 2, 2012 at 12:05 PM, Nilay Vaish <[email protected]> wrote:
> As of now, I am not too keen on this inter-cpu checkpoint restore. Let's > first start with restoring a checkpoint taken using TimingSimpleCPU or O3 > to itself. > I think you're actually making the problem harder, not easier. Our intention has always been that a checkpoint should only contain architectural state, so that you can generate a checkpoint from one model and restore it into a different one. So getting a CPU model other than AtomicSimpleCPU to both generate and restore from a checkpoint is two problems, while getting it to simply restore from a checkpoint is a strict subset of that. > So should we have a command line argument that specifies what cpu to > assume for restoring from the checkpoint? > In the long run, we should just assume that the CPU model you've asked for is the one that is restored from the checkpoint. The restore-to-atomic-then-switchover-even-when-you-didn't-ask-for-it behavior is a hack and should go away when it's no longer needed. It should still be possible to restore to an atomic CPU, run for a specified period of time to warm up the caches, then switch to a more detailed model, but that's something you should specifically have to request on the command line. Maybe in the interim there does need to be another command line argument to enable or disable the current hack, but that should just be a temporary thing. Steve _______________________________________________ gem5-dev mailing list [email protected] http://m5sim.org/mailman/listinfo/gem5-dev
