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Review request for Default. Summary ------- [--splitting the mips-fs patch--] The first problem: eret We met a compiling error of "NPC/NNPC may be used uninitialized", which caused by eret instruction. Actually, we don't need to care about the initial values of NPC and NNPC here, so we simply put them into a DPRINTF function, then the ISA parser can recognize them. Second: tlbwi/tlbwr The tlbwi/tlbwr instructions only call the getITBPtr() function and insertAt ITB, then the ITB and DTB are not synchronized. Because MIPS doesn't distinguish between ITB and DTB, we have to insertAt DTB at the same time, to make sure that the ITB and DTB have the same contents. In addition, the Random misc reg cannot generate a random integer correctly, so a static variable temporarily used here to give the index of TLB. Third: wait The wait instruction is temporarily implemented just the same as sync instruction. Last: rdhwr Implement the rdhwr instruction by generating a fault instead of FailUnimpl, because the linux kernel can emulate this kind of instructions when a coprocessor unusable fault occurs. Diffs ----- src/arch/mips/isa/decoder.isa f348cf78072c Diff: http://reviews.m5sim.org/r/999/diff Testing ------- Thanks, Deyuan _______________________________________________ gem5-dev mailing list [email protected] http://m5sim.org/mailman/listinfo/gem5-dev
