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Review request for Default. Description ------- Changeset 8732:75e54d141aa0 --------------------------- O3 CPU: Strengthen condition for handling interrupts The condition for handling interrupts is to check whether or not the cpu's instruction list is empty. As observed, this can lead to cases in which even though the instruction list is empty, interrupts are handled when they should not be. The condition is being strengthened so that interrupts get handled only when the last committed microop did not had IsDelayedCommit set. Diffs ----- src/cpu/o3/commit.hh 9d7c1dc54954 src/cpu/o3/commit_impl.hh 9d7c1dc54954 src/cpu/o3/fetch_impl.hh 9d7c1dc54954 Diff: http://reviews.gem5.org/r/1018/diff/diff Testing ------- Thanks, Nilay Vaish _______________________________________________ gem5-dev mailing list [email protected] http://m5sim.org/mailman/listinfo/gem5-dev
