[gem5-dev] changeset in gem5: MEM: Remove the otherPort from the cache ports

[Andreas Hansson]

changeset 2d8a57343fe3 in /z/repo/gem5
details: http://repo.gem5.org/gem5?cmd=changeset;node=2d8a57343fe3
description:
        MEM: Remove the otherPort from the cache ports

        This patch is a very straight-forward simplification, removing the
        unecessary otherPort pointer from the cache port. The pointer was only
        used to forward range changes, and the address range is fixed for the
        cache. Removing the pointer simplifies the transition to master/slave
        ports.

diffstat:

 src/mem/cache/base.cc       |  9 +--------
 src/mem/cache/base.hh       |  6 ------
 src/mem/cache/cache_impl.hh |  2 --
 3 files changed, 1 insertions(+), 16 deletions(-)

diffs (67 lines):

diff -r dd20a8139788 -r 2d8a57343fe3 src/mem/cache/base.cc
--- a/src/mem/cache/base.cc     Tue Jan 31 11:50:07 2012 -0500
+++ b/src/mem/cache/base.cc     Tue Jan 31 11:51:19 2012 -0500
@@ -44,8 +44,7 @@
 BaseCache::CachePort::CachePort(const std::string &_name, BaseCache *_cache,
                                 const std::string &_label)
     : SimpleTimingPort(_name, _cache), cache(_cache),
-      label(_label), otherPort(NULL),
-      blocked(false), mustSendRetry(false)
+      label(_label), blocked(false), mustSendRetry(false)
 {
 }
 
@@ -69,12 +68,6 @@
 {
 }
 
-void
-BaseCache::CachePort::recvRangeChange() const
-{
-    otherPort->sendRangeChange();
-}
-
 
 bool
 BaseCache::CachePort::checkFunctional(PacketPtr pkt)
diff -r dd20a8139788 -r 2d8a57343fe3 src/mem/cache/base.hh
--- a/src/mem/cache/base.hh     Tue Jan 31 11:50:07 2012 -0500
+++ b/src/mem/cache/base.hh     Tue Jan 31 11:51:19 2012 -0500
@@ -105,8 +105,6 @@
         CachePort(const std::string &_name, BaseCache *_cache,
                   const std::string &_label);
 
-        virtual void recvRangeChange() const;
-
         virtual unsigned deviceBlockSize() const;
 
         bool recvRetryCommon();
@@ -117,16 +115,12 @@
         const std::string label;
 
       public:
-        void setOtherPort(CachePort *_otherPort) { otherPort = _otherPort; }
-
         void setBlocked();
 
         void clearBlocked();
 
         bool checkFunctional(PacketPtr pkt);
 
-        CachePort *otherPort;
-
         bool blocked;
 
         bool mustSendRetry;
diff -r dd20a8139788 -r 2d8a57343fe3 src/mem/cache/cache_impl.hh
--- a/src/mem/cache/cache_impl.hh       Tue Jan 31 11:50:07 2012 -0500
+++ b/src/mem/cache/cache_impl.hh       Tue Jan 31 11:51:19 2012 -0500
@@ -77,8 +77,6 @@
                                   "CpuSidePort");
     memSidePort = new MemSidePort(p->name + "-mem_side_port", this,
                                   "MemSidePort");
-    cpuSidePort->setOtherPort(memSidePort);
-    memSidePort->setOtherPort(cpuSidePort);
 
     tags->setCache(this);
     if (prefetcher)
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