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Review request for Default. Description ------- MEM: Move all read/write blob functions from Port to PortProxy This patch moves the readBlob/writeBlob/memsetBlob from the Port class to the PortProxy class, thus making a clear separation of the basic port functionality (recv/send functional/atomic/timing), and the higher-level functional accessors available on the port proxies. There are only a few places in the code base where the blob functions were used on ports, and they are all for peeking into the memory system without making a normal memory access (in the memtest, and the malta and tsunami pchip). The memtest also exemplifies how easy it is to create a non-translating proxy if desired. The malta and tsunami pchip used a slave port to perform a functional read, and this is now changed to rely on the physProxy of the system (to which they already have a pointer). Diffs ----- src/cpu/testers/memtest/memtest.hh ef8630054b5e src/cpu/testers/memtest/memtest.cc ef8630054b5e src/dev/alpha/tsunami_pchip.cc ef8630054b5e src/dev/mips/malta_pchip.cc ef8630054b5e src/mem/port.hh ef8630054b5e src/mem/port.cc ef8630054b5e src/mem/port_proxy.hh ef8630054b5e Diff: http://reviews.gem5.org/r/1049/diff/diff Testing ------- util/regress all passing (disregarding t1000 and eio) Thanks, Andreas Hansson _______________________________________________ gem5-dev mailing list [email protected] http://m5sim.org/mailman/listinfo/gem5-dev
