changeset c92153af04ac in /z/repo/gem5
details: http://repo.gem5.org/gem5?cmd=changeset;node=c92153af04ac
description:
        cache: Allow main memory to be at disjoint address ranges.

diffstat:

 configs/example/fs.py                        |  2 +-
 src/mem/cache/BaseCache.py                   |  2 +-
 src/mem/cache/base.cc                        |  2 +-
 src/mem/cache/base.hh                        |  4 ++--
 src/mem/cache/cache_impl.hh                  |  4 +---
 tests/configs/pc-o3-timing.py                |  4 ++--
 tests/configs/pc-simple-atomic.py            |  4 ++--
 tests/configs/pc-simple-timing.py            |  4 ++--
 tests/configs/realview-o3-dual.py            |  2 +-
 tests/configs/realview-o3.py                 |  2 +-
 tests/configs/realview-simple-atomic-dual.py |  2 +-
 tests/configs/realview-simple-atomic.py      |  2 +-
 tests/configs/realview-simple-timing-dual.py |  2 +-
 tests/configs/realview-simple-timing.py      |  2 +-
 tests/configs/tsunami-inorder.py             |  2 +-
 tests/configs/tsunami-o3-dual.py             |  2 +-
 tests/configs/tsunami-o3.py                  |  2 +-
 tests/configs/tsunami-simple-atomic-dual.py  |  2 +-
 tests/configs/tsunami-simple-atomic.py       |  2 +-
 tests/configs/tsunami-simple-timing-dual.py  |  2 +-
 tests/configs/tsunami-simple-timing.py       |  2 +-
 21 files changed, 25 insertions(+), 27 deletions(-)

diffs (288 lines):

diff -r 87cafa076695 -r c92153af04ac configs/example/fs.py
--- a/configs/example/fs.py     Thu Mar 08 02:10:03 2012 -0800
+++ b/configs/example/fs.py     Fri Mar 09 09:59:25 2012 -0500
@@ -159,7 +159,7 @@
 else:
     mem_size = SysConfig().mem()
 if options.caches or options.l2cache:
-    test_sys.iocache = IOCache(addr_range=test_sys.physmem.range)
+    test_sys.iocache = IOCache(addr_ranges=[mem_size])
     test_sys.iocache.cpu_side = test_sys.iobus.master
     test_sys.iocache.mem_side = test_sys.membus.slave
 else:
diff -r 87cafa076695 -r c92153af04ac src/mem/cache/BaseCache.py
--- a/src/mem/cache/BaseCache.py        Thu Mar 08 02:10:03 2012 -0800
+++ b/src/mem/cache/BaseCache.py        Fri Mar 09 09:59:25 2012 -0500
@@ -60,5 +60,5 @@
     prefetcher = Param.BasePrefetcher(NULL,"Prefetcher attached to cache")
     cpu_side = SlavePort("Port on side closer to CPU")
     mem_side = MasterPort("Port on side closer to MEM")
-    addr_range = Param.AddrRange(AllMemory, "The address range for the 
CPU-side port")
+    addr_ranges = VectorParam.AddrRange([AllMemory], "The address range for 
the CPU-side port")
     system = Param.System(Parent.any, "System we belong to")
diff -r 87cafa076695 -r c92153af04ac src/mem/cache/base.cc
--- a/src/mem/cache/base.cc     Thu Mar 08 02:10:03 2012 -0800
+++ b/src/mem/cache/base.cc     Fri Mar 09 09:59:25 2012 -0500
@@ -83,7 +83,7 @@
       noTargetMSHR(NULL),
       missCount(p->max_miss_count),
       drainEvent(NULL),
-      addrRange(p->addr_range),
+      addrRanges(p->addr_ranges.begin(), p->addr_ranges.end()),
       system(p->system)
 {
 }
diff -r 87cafa076695 -r c92153af04ac src/mem/cache/base.hh
--- a/src/mem/cache/base.hh     Thu Mar 08 02:10:03 2012 -0800
+++ b/src/mem/cache/base.hh     Fri Mar 09 09:59:25 2012 -0500
@@ -269,7 +269,7 @@
     /**
      * The address range to which the cache responds on the CPU side.
      * Normally this is all possible memory addresses. */
-    Range<Addr> addrRange;
+    AddrRangeList addrRanges;
 
   public:
     /** System we are currently operating in. */
@@ -439,7 +439,7 @@
     Addr blockAlign(Addr addr) const { return (addr & ~(Addr(blkSize - 1))); }
 
 
-    const Range<Addr> &getAddrRange() const { return addrRange; }
+    const AddrRangeList &getAddrRanges() const { return addrRanges; }
 
     MSHR *allocateMissBuffer(PacketPtr pkt, Tick time, bool requestBus)
     {
diff -r 87cafa076695 -r c92153af04ac src/mem/cache/cache_impl.hh
--- a/src/mem/cache/cache_impl.hh       Thu Mar 08 02:10:03 2012 -0800
+++ b/src/mem/cache/cache_impl.hh       Fri Mar 09 09:59:25 2012 -0500
@@ -1556,9 +1556,7 @@
 AddrRangeList
 Cache<TagStore>::CpuSidePort::getAddrRanges()
 {
-    AddrRangeList ranges;
-    ranges.push_back(cache->getAddrRange());
-    return ranges;
+    return cache->getAddrRanges();
 }
 
 template<class TagStore>
diff -r 87cafa076695 -r c92153af04ac tests/configs/pc-o3-timing.py
--- a/tests/configs/pc-o3-timing.py     Thu Mar 08 02:10:03 2012 -0800
+++ b/tests/configs/pc-o3-timing.py     Fri Mar 09 09:59:25 2012 -0500
@@ -77,7 +77,7 @@
     mshrs = 20
     size = '1kB'
     tgts_per_mshr = 12
-    addr_range = AddrRange(0, size=mem_size)
+    addr_ranges = [AddrRange(0, size=mem_size)]
     forward_snoops = False
 
 #cpu
@@ -86,7 +86,7 @@
 mdesc = SysConfig(disk = 'linux-x86.img')
 system = FSConfig.makeLinuxX86System('timing', mdesc=mdesc)
 system.kernel = FSConfig.binary('x86_64-vmlinux-2.6.22.9')
-system.iocache = IOCache(addr_range=mem_size)
+system.iocache = IOCache()
 system.iocache.cpu_side = system.iobus.master
 system.iocache.mem_side = system.membus.slave
 
diff -r 87cafa076695 -r c92153af04ac tests/configs/pc-simple-atomic.py
--- a/tests/configs/pc-simple-atomic.py Thu Mar 08 02:10:03 2012 -0800
+++ b/tests/configs/pc-simple-atomic.py Fri Mar 09 09:59:25 2012 -0500
@@ -78,7 +78,7 @@
     mshrs = 20
     size = '1kB'
     tgts_per_mshr = 12
-    addr_range = AddrRange(0, size=mem_size)
+    addr_ranges = [AddrRange(0, size=mem_size)]
     forward_snoops = False
     is_top_level = True
 
@@ -88,7 +88,7 @@
 mdesc = SysConfig(disk = 'linux-x86.img')
 system = FSConfig.makeLinuxX86System('atomic', mdesc=mdesc)
 system.kernel = FSConfig.binary('x86_64-vmlinux-2.6.22.9')
-system.iocache = IOCache(addr_range=mem_size)
+system.iocache = IOCache()
 system.iocache.cpu_side = system.iobus.master
 system.iocache.mem_side = system.membus.slave
 
diff -r 87cafa076695 -r c92153af04ac tests/configs/pc-simple-timing.py
--- a/tests/configs/pc-simple-timing.py Thu Mar 08 02:10:03 2012 -0800
+++ b/tests/configs/pc-simple-timing.py Fri Mar 09 09:59:25 2012 -0500
@@ -78,7 +78,7 @@
     mshrs = 20
     size = '1kB'
     tgts_per_mshr = 12
-    addr_range = AddrRange(0, size=mem_size)
+    addr_ranges = [AddrRange(0, size=mem_size)]
     forward_snoops = False
 
 #cpu
@@ -91,7 +91,7 @@
 system.cpu = cpu
 #create the l1/l2 bus
 system.toL2Bus = Bus()
-system.iocache = IOCache(addr_range=mem_size)
+system.iocache = IOCache()
 system.iocache.cpu_side = system.iobus.master
 system.iocache.mem_side = system.membus.slave
 
diff -r 87cafa076695 -r c92153af04ac tests/configs/realview-o3-dual.py
--- a/tests/configs/realview-o3-dual.py Thu Mar 08 02:10:03 2012 -0800
+++ b/tests/configs/realview-o3-dual.py Fri Mar 09 09:59:25 2012 -0500
@@ -64,7 +64,7 @@
     mshrs = 20
     size = '1kB'
     tgts_per_mshr = 12
-    addr_range=AddrRange(0, size='256MB')
+    addr_ranges = [AddrRange(0, size='256MB')]
     forward_snoops = False
 
 #cpu
diff -r 87cafa076695 -r c92153af04ac tests/configs/realview-o3.py
--- a/tests/configs/realview-o3.py      Thu Mar 08 02:10:03 2012 -0800
+++ b/tests/configs/realview-o3.py      Fri Mar 09 09:59:25 2012 -0500
@@ -64,7 +64,7 @@
     mshrs = 20
     size = '1kB'
     tgts_per_mshr = 12
-    addr_range=AddrRange(0, size='256MB')
+    addr_ranges = [AddrRange(0, size='256MB')]
     forward_snoops = False
 
 #cpu
diff -r 87cafa076695 -r c92153af04ac 
tests/configs/realview-simple-atomic-dual.py
--- a/tests/configs/realview-simple-atomic-dual.py      Thu Mar 08 02:10:03 
2012 -0800
+++ b/tests/configs/realview-simple-atomic-dual.py      Fri Mar 09 09:59:25 
2012 -0500
@@ -64,7 +64,7 @@
     mshrs = 20
     size = '1kB'
     tgts_per_mshr = 12
-    addr_range=AddrRange(0, size='256MB')
+    addr_ranges = [AddrRange(0, size='256MB')]
     forward_snoops = False
 
 #cpu
diff -r 87cafa076695 -r c92153af04ac tests/configs/realview-simple-atomic.py
--- a/tests/configs/realview-simple-atomic.py   Thu Mar 08 02:10:03 2012 -0800
+++ b/tests/configs/realview-simple-atomic.py   Fri Mar 09 09:59:25 2012 -0500
@@ -63,7 +63,7 @@
     mshrs = 20
     size = '1kB'
     tgts_per_mshr = 12
-    addr_range=AddrRange(0, size='256MB')
+    addr_ranges = [AddrRange(0, size='256MB')]
     forward_snoops = False
 
 #cpu
diff -r 87cafa076695 -r c92153af04ac 
tests/configs/realview-simple-timing-dual.py
--- a/tests/configs/realview-simple-timing-dual.py      Thu Mar 08 02:10:03 
2012 -0800
+++ b/tests/configs/realview-simple-timing-dual.py      Fri Mar 09 09:59:25 
2012 -0500
@@ -64,7 +64,7 @@
     mshrs = 20
     size = '1kB'
     tgts_per_mshr = 12
-    addr_range=AddrRange(0, size='256MB')
+    addr_ranges = [AddrRange(0, size='256MB')]
     forward_snoops = False
 
 #cpu
diff -r 87cafa076695 -r c92153af04ac tests/configs/realview-simple-timing.py
--- a/tests/configs/realview-simple-timing.py   Thu Mar 08 02:10:03 2012 -0800
+++ b/tests/configs/realview-simple-timing.py   Fri Mar 09 09:59:25 2012 -0500
@@ -64,7 +64,7 @@
     mshrs = 20
     size = '1kB'
     tgts_per_mshr = 12
-    addr_range=AddrRange(0, size='256MB')
+    addr_ranges = [AddrRange(0, size='256MB')]
     forward_snoops = False
 
 #cpu
diff -r 87cafa076695 -r c92153af04ac tests/configs/tsunami-inorder.py
--- a/tests/configs/tsunami-inorder.py  Thu Mar 08 02:10:03 2012 -0800
+++ b/tests/configs/tsunami-inorder.py  Fri Mar 09 09:59:25 2012 -0500
@@ -64,7 +64,7 @@
     mshrs = 20
     size = '1kB'
     tgts_per_mshr = 12
-    addr_range=AddrRange(0, size='8GB')
+    addr_ranges = [AddrRange(0, size='8GB')]
     forward_snoops = False
     is_top_level = True
 
diff -r 87cafa076695 -r c92153af04ac tests/configs/tsunami-o3-dual.py
--- a/tests/configs/tsunami-o3-dual.py  Thu Mar 08 02:10:03 2012 -0800
+++ b/tests/configs/tsunami-o3-dual.py  Fri Mar 09 09:59:25 2012 -0500
@@ -64,7 +64,7 @@
     mshrs = 20
     size = '1kB'
     tgts_per_mshr = 12
-    addr_range=AddrRange(0, size='8GB')
+    addr_ranges = [AddrRange(0, size='8GB')]
     forward_snoops = False
     is_top_level = True
 
diff -r 87cafa076695 -r c92153af04ac tests/configs/tsunami-o3.py
--- a/tests/configs/tsunami-o3.py       Thu Mar 08 02:10:03 2012 -0800
+++ b/tests/configs/tsunami-o3.py       Fri Mar 09 09:59:25 2012 -0500
@@ -64,7 +64,7 @@
     mshrs = 20
     size = '1kB'
     tgts_per_mshr = 12
-    addr_range=AddrRange(0, size='8GB')
+    addr_ranges = [AddrRange(0, size='8GB')]
     forward_snoops = False
     is_top_level = True
 
diff -r 87cafa076695 -r c92153af04ac tests/configs/tsunami-simple-atomic-dual.py
--- a/tests/configs/tsunami-simple-atomic-dual.py       Thu Mar 08 02:10:03 
2012 -0800
+++ b/tests/configs/tsunami-simple-atomic-dual.py       Fri Mar 09 09:59:25 
2012 -0500
@@ -63,7 +63,7 @@
     mshrs = 20
     size = '1kB'
     tgts_per_mshr = 12
-    addr_range=AddrRange(0, size='8GB')
+    addr_ranges = [AddrRange(0, size='8GB')]
     forward_snoops = False
     is_top_level = True
 
diff -r 87cafa076695 -r c92153af04ac tests/configs/tsunami-simple-atomic.py
--- a/tests/configs/tsunami-simple-atomic.py    Thu Mar 08 02:10:03 2012 -0800
+++ b/tests/configs/tsunami-simple-atomic.py    Fri Mar 09 09:59:25 2012 -0500
@@ -63,7 +63,7 @@
     mshrs = 20
     size = '1kB'
     tgts_per_mshr = 12
-    addr_range=AddrRange(0, size='8GB')
+    addr_ranges = [AddrRange(0, size='8GB')]
     forward_snoops = False
     is_top_level = True
 
diff -r 87cafa076695 -r c92153af04ac tests/configs/tsunami-simple-timing-dual.py
--- a/tests/configs/tsunami-simple-timing-dual.py       Thu Mar 08 02:10:03 
2012 -0800
+++ b/tests/configs/tsunami-simple-timing-dual.py       Fri Mar 09 09:59:25 
2012 -0500
@@ -63,7 +63,7 @@
     mshrs = 20
     size = '1kB'
     tgts_per_mshr = 12
-    addr_range=AddrRange(0, size='8GB')
+    addr_ranges = [AddrRange(0, size='8GB')]
     forward_snoops = False
     is_top_level = True
 
diff -r 87cafa076695 -r c92153af04ac tests/configs/tsunami-simple-timing.py
--- a/tests/configs/tsunami-simple-timing.py    Thu Mar 08 02:10:03 2012 -0800
+++ b/tests/configs/tsunami-simple-timing.py    Fri Mar 09 09:59:25 2012 -0500
@@ -64,7 +64,7 @@
     mshrs = 20
     size = '1kB'
     tgts_per_mshr = 12
-    addr_range=AddrRange(0, size='8GB')
+    addr_ranges = [AddrRange(0, size='8GB')]
     forward_snoops = False
     is_top_level = True
 
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