----------------------------------------------------------- This is an automatically generated e-mail. To reply, visit: http://reviews.gem5.org/r/1107/ -----------------------------------------------------------
Review request for Default. Description ------- Ruby: Remove the physMemPort and instead access memory directly This patch removes the physMemPort from the RubySequencer and instead uses the system pointer to access the physmem. The system already keeps track of the physmem and the valid memory address ranges, and with this patch we merely make use of that existing functionality. The memory is modified so that it is possible to call the access functions (atomic and functional) without going through the port, and the memory is allowed to be unconnected, i.e. have no ports (since Ruby does not attach it like the conventional memory system). Diffs ----- configs/ruby/MESI_CMP_directory.py c739a3a829f5 configs/ruby/MI_example.py c739a3a829f5 configs/ruby/MOESI_CMP_directory.py c739a3a829f5 configs/ruby/MOESI_CMP_token.py c739a3a829f5 configs/ruby/MOESI_hammer.py c739a3a829f5 configs/ruby/Network_test.py c739a3a829f5 configs/ruby/Ruby.py c739a3a829f5 src/mem/physical.hh c739a3a829f5 src/mem/physical.cc c739a3a829f5 src/mem/ruby/system/RubyPort.hh c739a3a829f5 src/mem/ruby/system/RubyPort.cc c739a3a829f5 src/mem/ruby/system/Sequencer.py c739a3a829f5 Diff: http://reviews.gem5.org/r/1107/diff/ Testing ------- util/regress all passing (disregarding t1000 and eio) Thanks, Andreas Hansson _______________________________________________ gem5-dev mailing list [email protected] http://m5sim.org/mailman/listinfo/gem5-dev
