changeset c955a451271e in /z/repo/gem5
details: http://repo.gem5.org/gem5?cmd=changeset;node=c955a451271e
description:
        MOESI_hammer: tbe allocation and dependent wakeup fixes

diffstat:

 src/mem/protocol/MOESI_hammer-cache.sm |  31 ++++++++++++++++++++++++++-----
 src/mem/protocol/MOESI_hammer-dir.sm   |   4 ++++
 2 files changed, 30 insertions(+), 5 deletions(-)

diffs (103 lines):

diff -r f467d4db555a -r c955a451271e src/mem/protocol/MOESI_hammer-cache.sm
--- a/src/mem/protocol/MOESI_hammer-cache.sm    Fri Apr 06 13:47:07 2012 -0700
+++ b/src/mem/protocol/MOESI_hammer-cache.sm    Fri Apr 06 13:47:07 2012 -0700
@@ -1481,6 +1481,7 @@
   transition(SR, {Load, Ifetch}, S) {
     h_load_hit;
     k_popMandatoryQueue;
+    ka_wakeUpAllDependents;
   }
 
   transition({S, SR}, Store, SM) {
@@ -1525,6 +1526,7 @@
   transition(OR, {Load, Ifetch}, O) {
     h_load_hit;
     k_popMandatoryQueue;
+    ka_wakeUpAllDependents;
   }
 
   transition({O, OR}, Store, OM) {
@@ -1569,16 +1571,28 @@
   }
 
   // Transitions from Modified
-  transition({MM, MMR}, {Load, Ifetch}, MM) {
+  transition({MM, M}, {Load, Ifetch}) {
     h_load_hit;
     k_popMandatoryQueue;
   }
 
-  transition({MM, MMR}, Store, MM) {
+  transition(MM, Store) {
     hh_store_hit;
     k_popMandatoryQueue;
   }
 
+  transition(MMR, {Load, Ifetch}, MM) {
+    h_load_hit;
+    k_popMandatoryQueue;
+    ka_wakeUpAllDependents;
+  }
+
+  transition(MMR, Store, MM) {
+    hh_store_hit;
+    k_popMandatoryQueue;
+    ka_wakeUpAllDependents;
+  }
+
   transition({MM, M, MMR, MR}, Flush_line, MM_F) {
     i_allocateTBE;
     bf_issueGETF;
@@ -1630,14 +1644,21 @@
   }
  
   // Transitions from Dirty Exclusive
-  transition({M, MR}, {Load, Ifetch}, M) {
-    h_load_hit;
+  transition(M, Store, MM) {
+    hh_store_hit;
     k_popMandatoryQueue;
   }
 
-  transition({M, MR}, Store, MM) {
+  transition(MR, {Load, Ifetch}, M) {
+    h_load_hit;
+    k_popMandatoryQueue;
+    ka_wakeUpAllDependents;
+  }
+
+  transition(MR, Store, MM) {
     hh_store_hit;
     k_popMandatoryQueue;
+    ka_wakeUpAllDependents;
   }
 
   transition(M, L2_Replacement, MI) {
diff -r f467d4db555a -r c955a451271e src/mem/protocol/MOESI_hammer-dir.sm
--- a/src/mem/protocol/MOESI_hammer-dir.sm      Fri Apr 06 13:47:07 2012 -0700
+++ b/src/mem/protocol/MOESI_hammer-dir.sm      Fri Apr 06 13:47:07 2012 -0700
@@ -542,6 +542,7 @@
   }
 
   action(v_allocateTBE, "v", desc="Allocate TBE") {
+    check_allocate(TBEs);
     peek(requestQueue_in, RequestMsg) {
       TBEs.allocate(address);
       set_tbe(TBEs[address]);
@@ -551,6 +552,7 @@
   }
 
   action(vd_allocateDmaRequestInTBE, "vd", desc="Record Data in TBE") {
+    check_allocate(TBEs);
     peek(dmaRequestQueue_in, DMARequestMsg) {
       TBEs.allocate(address);
       set_tbe(TBEs[address]);
@@ -1258,6 +1260,8 @@
     peek(unblockNetwork_in, ResponseMsg) {
       assert(in_msg.Dirty == false);
       assert(in_msg.MessageSize == MessageSizeType:Writeback_Control);
+      DPRINTF(RubySlicc, "%s\n", in_msg.DataBlk);
+      DPRINTF(RubySlicc, "%s\n", getDirectoryEntry(address).DataBlk);
 
       // NOTE: The following check would not be valid in a real
       // implementation.  We include the data in the "dataless"
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