changeset 7925057dc4d8 in /z/repo/gem5
details: http://repo.gem5.org/gem5?cmd=changeset;node=7925057dc4d8
description:
slicc: Controllers attached to Sequencers no longer have to be named
L1Cache.
diffstat:
src/mem/slicc/symbols/StateMachine.py | 7 +++++++
1 files changed, 7 insertions(+), 0 deletions(-)
diffs (17 lines):
diff -r 225590437eb2 -r 7925057dc4d8 src/mem/slicc/symbols/StateMachine.py
--- a/src/mem/slicc/symbols/StateMachine.py Fri Apr 06 13:47:07 2012 -0700
+++ b/src/mem/slicc/symbols/StateMachine.py Fri Apr 06 13:47:08 2012 -0700
@@ -499,6 +499,13 @@
code('''
m_${{seq}}_ptr->setController(this);
''')
+
+ else:
+ for seq in sequencers:
+ code('''
+m_${{seq}}_ptr->setController(this);
+ ''')
+
#
# For the DMA controller, pass the sequencer a pointer to the
# controller.
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