changeset 89726ded0c46 in /z/repo/gem5
details: http://repo.gem5.org/gem5?cmd=changeset;node=89726ded0c46
description:
        IGbE: Fix writeback conditions for i8254x GbE in updated data sheet.

        An older revision of the data sheet specified that txdctl.gran was 1 
the granularity was
        based on cache block and gran being 0 is based on descriptor count. The 
newer version of
        the data sheet reverses this errata

diffstat:

 src/dev/i8254xGBe.cc |  4 ++--
 1 files changed, 2 insertions(+), 2 deletions(-)

diffs (18 lines):

diff -r 8800b05e1cb3 -r 89726ded0c46 src/dev/i8254xGBe.cc
--- a/src/dev/i8254xGBe.cc      Wed May 09 11:52:14 2012 -0700
+++ b/src/dev/i8254xGBe.cc      Thu May 10 18:04:26 2012 -0500
@@ -1923,12 +1923,12 @@
         igbe->anBegin("TXS", "Desc Writeback");
         DPRINTF(EthernetDesc, "WTHRESH == 0, writing back descriptor\n");
         writeback(0);
-    } else if (igbe->regs.txdctl.gran() && igbe->regs.txdctl.wthresh() >=
+    } else if (!igbe->regs.txdctl.gran() && igbe->regs.txdctl.wthresh() <=
                descInBlock(usedCache.size())) {
         DPRINTF(EthernetDesc, "used > WTHRESH, writing back descriptor\n");
         igbe->anBegin("TXS", "Desc Writeback");
         writeback((igbe->cacheBlockSize()-1)>>4);
-    } else if (igbe->regs.txdctl.wthresh() >= usedCache.size()) {
+    } else if (igbe->regs.txdctl.wthresh() <= usedCache.size()) {
         DPRINTF(EthernetDesc, "used > WTHRESH, writing back descriptor\n");
         igbe->anBegin("TXS", "Desc Writeback");
         writeback((igbe->cacheBlockSize()-1)>>4);
_______________________________________________
gem5-dev mailing list
[email protected]
http://m5sim.org/mailman/listinfo/gem5-dev

Reply via email to