Hello!
   I guess i was not clear enough in my question last time as i din't
receive any response so here i am.

1) I want to modify gem5 so that it can identify shared region among the
processes.
2) I found that arch/x86 may support system calls like shmget, shmctl etc.
but currently those system calls are  not implemented.
But,
I am working with alpha "(SE mode)" so is there any way that i can modify
gem5
i) To support the system calls mentioned above.
ii) or may be use other IPC methods like message passing or others.

     Thank you.
Vishal

On Wed, Jun 20, 2012 at 2:51 PM, <[email protected]> wrote:

> Send gem5-dev mailing list submissions to
>        [email protected]
>
> To subscribe or unsubscribe via the World Wide Web, visit
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> or, via email, send a message with subject or body 'help' to
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> When replying, please edit your Subject line so it is more specific
> than "Re: Contents of gem5-dev digest..."
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>
> Today's Topics:
>
>   1. Re: New stable release? (Ali Saidi)
>   2. Re: New stable release? (Korey Sewell)
>   3. Re: New stable release? (Ali Saidi)
>   4. Implementation of producer consumer problem. (vishal rawtiya)
>   5. Cron <m5test@zizzer> /z/m5/regression/do-regression quick
>      (Cron Daemon)
>   6. Re: Review Request: Bus: Replace tickNextIdle and inRetry
>      with a state variable (Nilay Vaish)
>   7. Re: Review Request: Port: Add protocol-agnostic ports in  the
>      port hierarchy (Nilay Vaish)
>
>
> ----------------------------------------------------------------------
>
> Message: 1
> Date: Tue, 19 Jun 2012 16:24:56 -0500
> From: Ali Saidi <[email protected]>
> To: <[email protected]>
> Subject: Re: [gem5-dev] New stable release?
> Message-ID: <[email protected]>
> Content-Type: text/plain; charset=UTF-8
>
>
>
> Due to the overwhelming lack of response, I'm assuming we're doing
> this until told otherwise...
>
> Ali
>
> On 07.06.2012 17:32, Ali Saidi
> wrote:
>
> > Hi Everyone,
> >
> > I think it's about time we updated the
> stable gem5
> > release. It's been a bit over 6 months. I'd like to
> propose that we only
> > allow bug fixes into the repository for the next
> three weeks and at that
> > time tag the latest revision and stable.
> Thoughts?
> >
> > Thanks,
> >
> > Ali
> >
> >
> _______________________________________________
> > gem5-dev mailing
> list
> > [email protected]
> > http://m5sim.org/mailman/listinfo/gem5-dev
>
>
>
> ------------------------------
>
> Message: 2
> Date: Tue, 19 Jun 2012 14:42:30 -0700
> From: Korey Sewell <[email protected]>
> To: gem5 Developer List <[email protected]>
> Subject: Re: [gem5-dev] New stable release?
> Message-ID:
>        <CABVets55UDe_PgSsEEhf-iDwOp9dDA5LQYL=pde4lg-auwa...@mail.gmail.com
> >
> Content-Type: text/plain; charset=ISO-8859-1
>
> Hey,
> sorry I missed this, but I'd agree w/the push of a stable release.
>
> Can you give me until the weekend? I'd like to place the proper
> copyrights on the top of the inorder files...
>
> Other then that, Let's make sure all the regressions pass and push!
>
>
>
> On Tue, Jun 19, 2012 at 2:24 PM, Ali Saidi <[email protected]> wrote:
> >
> >
> > Due to the overwhelming lack of response, I'm assuming we're doing
> > this until told otherwise...
> >
> > Ali
> >
> > On 07.06.2012 17:32, Ali Saidi
> > wrote:
> >
> >> Hi Everyone,
> >>
> >> I think it's about time we updated the
> > stable gem5
> >> release. It's been a bit over 6 months. I'd like to
> > propose that we only
> >> allow bug fixes into the repository for the next
> > three weeks and at that
> >> time tag the latest revision and stable.
> > Thoughts?
> >>
> >> Thanks,
> >>
> >> Ali
> >>
> >>
> > _______________________________________________
> >> gem5-dev mailing
> > list
> >> [email protected]
> >> http://m5sim.org/mailman/listinfo/gem5-dev
> >
> >
> > _______________________________________________
> > gem5-dev mailing list
> > [email protected]
> > http://m5sim.org/mailman/listinfo/gem5-dev
>
>
>
> --
> - Korey
>
>
> ------------------------------
>
> Message: 3
> Date: Tue, 19 Jun 2012 17:00:09 -0500
> From: Ali Saidi <[email protected]>
> To: gem5 Developer List <[email protected]>
> Subject: Re: [gem5-dev] New stable release?
> Message-ID: <[email protected]>
> Content-Type: text/plain; charset=UTF-8
>
>
>
> HI Korey,
>
> The idea is to way a few more weeks without committing
> anything other than bug fixes to dev, so that we have a higher level of
> confidence in the release.
>
> Ali
>
> On 19.06.2012 16:42, Korey Sewell
> wrote:
>
> > Hey,
> > sorry I missed this, but I'd agree w/the push of a
> stable release.
> >
> > Can you give me until the weekend? I'd like to
> place the proper
> > copyrights on the top of the inorder files...
> >
> >
> Other then that, Let's make sure all the regressions pass and push!
> >
> >
> On Tue, Jun 19, 2012 at 2:24 PM, Ali Saidi <[email protected]> wrote:
> >
>
> >> Due to the overwhelming lack of response, I'm assuming we're doing
> this until told otherwise... Ali On 07.06.2012 17:32, Ali Saidi wrote:
>
> >>
> >>> Hi Everyone, I think it's about time we updated the
> >> stable
> gem5
> >>
> >>> release. It's been a bit over 6 months. I'd like to
> >>
> propose that we only time tag the latest revision and stable.
> Thoughts?
>
>
>
> Links:
> ------
> [1]
> http://m5sim.org/mailman/listinfo/gem5-dev
>
>
> ------------------------------
>
> Message: 4
> Date: Wed, 20 Jun 2012 10:15:36 +0530
> From: vishal rawtiya <[email protected]>
> To: [email protected]
> Subject: [gem5-dev] Implementation of producer consumer problem.
> Message-ID:
>        <cannm73dp-v3wvnc-zemhhu82ivt03go9cowl_pedrd_rs0l...@mail.gmail.com
> >
> Content-Type: text/plain; charset=ISO-8859-1
>
>  I am a beginner at gem5, so forgive me for any ignorance. I want to test
> my modified cache system.
> I am using ALPHA_SE.
>
> And to test my environment.
> I need to write producer consumer program in which an array is shared
> between producer and consumer.
>
> But my problem is that i can not figure out the way to share variables
> across the program.
> The only way i know is by using system calls like *shmget, shmctl *but
> those are not supported by gem5.
>
> So is there any other way i can make it work.
>
>
>
> Thanks in advance.
>
> Regards,
> Vishal Rawtiya
> [email protected]
> Indian Institue Of Technology Delhi
> Dept.Of Comp.Sci.& Engg.
>
>
> ------------------------------
>
> Message: 5
> Date: Wed, 20 Jun 2012 03:05:31 -0400
> From: [email protected] (Cron Daemon)
> To: [email protected]
> Subject: [gem5-dev] Cron <m5test@zizzer>
>        /z/m5/regression/do-regression quick
> Message-ID: <E1ShEyp-0003fs-LQ@zizzer>
> Content-Type: text/plain; charset=ANSI_X3.4-1968
>
> ***** build/ALPHA/tests/opt/quick/se/20.eio-short/alpha/eio/simple-timing
> FAILED!
> *****
> build/ALPHA/tests/opt/quick/se/00.hello/alpha/tru64/simple-timing-ruby
> passed.*****
> build/ALPHA/tests/opt/quick/se/30.eio-mp/alpha/eio/simple-atomic-mp FAILED!
> ***** build/ALPHA/tests/opt/quick/se/30.eio-mp/alpha/eio/simple-timing-mp
> FAILED!
> ***** build/ALPHA/tests/opt/quick/se/20.eio-short/alpha/eio/simple-atomic
> FAILED!
> scons: `build/ALPHA/gem5.debug' is up to date.
> scons: `build/ALPHA_MOESI_hammer/gem5.debug' is up to date.
> scons: `build/ALPHA_MESI_CMP_directory/gem5.debug' is up to date.
> scons: `build/ALPHA_MOESI_CMP_directory/gem5.debug' is up to date.
> scons: `build/ALPHA_MOESI_CMP_token/gem5.debug' is up to date.
> scons: `build/MIPS/gem5.debug' is up to date.
> scons: `build/POWER/gem5.debug' is up to date.
> scons: `build/SPARC/gem5.debug' is up to date.
> scons: `build/X86/gem5.debug' is up to date.
> scons: `build/X86_MESI_CMP_directory/gem5.debug' is up to date.
> scons: `build/ARM/gem5.debug' is up to date.
> scons: `build/ALPHA/gem5.fast' is up to date.
> scons: `build/ALPHA_MOESI_hammer/gem5.fast' is up to date.
> scons: `build/ALPHA_MESI_CMP_directory/gem5.fast' is up to date.
> scons: `build/ALPHA_MOESI_CMP_directory/gem5.fast' is up to date.
> scons: `build/ALPHA_MOESI_CMP_token/gem5.fast' is up to date.
> scons: `build/MIPS/gem5.fast' is up to date.
> scons: `build/POWER/gem5.fast' is up to date.
> scons: `build/SPARC/gem5.fast' is up to date.
> scons: `build/X86/gem5.fast' is up to date.
> scons: `build/X86_MESI_CMP_directory/gem5.fast' is up to date.
> scons: `build/ARM/gem5.fast' is up to date.
> scons: `build/ALPHA_MOESI_hammer/tests/opt/quick/fs' is up to date.
> scons: `build/ALPHA_MESI_CMP_directory/tests/opt/quick/fs' is up to date.
> scons: `build/ALPHA_MOESI_CMP_directory/tests/opt/quick/fs' is up to date.
> scons: `build/ALPHA_MOESI_CMP_token/tests/opt/quick/fs' is up to date.
> scons: `build/MIPS/tests/opt/quick/fs' is up to date.
> scons: `build/POWER/tests/opt/quick/fs' is up to date.
> *****
> build/X86/tests/opt/quick/fs/10.linux-boot/x86/linux/pc-simple-timing
> passed.scons: `build/X86_MESI_CMP_directory/tests/opt/quick/se' is up to
> date.
> scons: `build/X86_MESI_CMP_directory/tests/opt/quick/fs' is up to date.
> ***** build/ALPHA/tests/opt/quick/se/00.hello/alpha/linux/inorder-timing
> passed.
> ***** build/ALPHA/tests/opt/quick/se/00.hello/alpha/linux/o3-timing passed.
> ***** build/ALPHA/tests/opt/quick/se/00.hello/alpha/linux/simple-atomic
> passed.
> ***** build/ALPHA/tests/opt/quick/se/00.hello/alpha/linux/simple-timing
> passed.
> *****
> build/ALPHA/tests/opt/quick/se/00.hello/alpha/linux/simple-timing-ruby
> passed.
> ***** build/ALPHA/tests/opt/quick/se/00.hello/alpha/tru64/o3-timing passed.
> ***** build/ALPHA/tests/opt/quick/se/00.hello/alpha/tru64/simple-timing
> passed.
> *****
> build/ALPHA/tests/opt/quick/se/00.hello/alpha/tru64/simple-timing-ruby
> passed.*****
> build/ALPHA/tests/opt/quick/se/30.eio-mp/alpha/eio/simple-atomic-mp FAILED!
> ***** build/ALPHA/tests/opt/quick/se/01.hello-2T-smt/alpha/linux/o3-timing
> passed.
> ***** build/ALPHA/tests/opt/quick/se/50.memtest/alpha/linux/memtest passed.
> ***** build/ALPHA/tests/opt/quick/se/50.memtest/alpha/linux/memtest-ruby
> passed.
> ***** build/ALPHA/tests/opt/quick/se/60.rubytest/alpha/linux/rubytest-ruby
> passed.
> ***** build/ALPHA/tests/opt/quick/se/00.hello/alpha/tru64/simple-atomic
> passed.
> *****
> build/ALPHA/tests/opt/quick/fs/10.linux-boot/alpha/linux/tsunami-simple-atomic-dual
> passed.
> *****
> build/ALPHA/tests/opt/quick/fs/10.linux-boot/alpha/linux/tsunami-simple-atomic
> passed.
> *****
> build/ALPHA/tests/opt/quick/fs/10.linux-boot/alpha/linux/tsunami-simple-timing
> passed.
> *****
> build/ALPHA/tests/opt/quick/fs/10.linux-boot/alpha/linux/tsunami-simple-timing-dual
> passed.
> *****
> build/ALPHA/tests/opt/quick/fs/80.netperf-stream/alpha/linux/twosys-tsunami-simple-atomic
> passed.
> *****
> build/ALPHA_MOESI_hammer/tests/opt/quick/se/00.hello/alpha/tru64/simple-timing-ruby-MOESI_hammer
> passed.
> *****
> build/ALPHA_MOESI_hammer/tests/opt/quick/se/60.rubytest/alpha/linux/rubytest-ruby-MOESI_hammer
> passed.
> *****
> build/ALPHA_MOESI_hammer/tests/opt/quick/se/50.memtest/alpha/linux/memtest-ruby-MOESI_hammer
> passed.
> *****
> build/ALPHA_MOESI_hammer/tests/opt/quick/se/00.hello/alpha/linux/simple-timing-ruby-MOESI_hammer
> passed.
> *****
> build/ALPHA_MESI_CMP_directory/tests/opt/quick/se/00.hello/alpha/linux/simple-timing-ruby-MESI_CMP_directory
> passed.
> *****
> build/ALPHA_MESI_CMP_directory/tests/opt/quick/se/50.memtest/alpha/linux/memtest-ruby-MESI_CMP_directory
> passed.
> *****
> build/ALPHA_MESI_CMP_directory/tests/opt/quick/se/00.hello/alpha/tru64/simple-timing-ruby-MESI_CMP_directory
> passed.
> *****
> build/ALPHA_MESI_CMP_directory/tests/opt/quick/se/60.rubytest/alpha/linux/rubytest-ruby-MESI_CMP_directory
> passed.
> *****
> build/ALPHA_MOESI_CMP_directory/tests/opt/quick/se/00.hello/alpha/linux/simple-timing-ruby-MOESI_CMP_directory
> passed.
> *****
> build/ALPHA_MOESI_CMP_directory/tests/opt/quick/se/00.hello/alpha/tru64/simple-timing-ruby-MOESI_CMP_directory
> passed.
> *****
> build/ALPHA_MOESI_CMP_directory/tests/opt/quick/se/50.memtest/alpha/linux/memtest-ruby-MOESI_CMP_directory
> passed.
> *****
> build/ALPHA_MOESI_CMP_directory/tests/opt/quick/se/60.rubytest/alpha/linux/rubytest-ruby-MOESI_CMP_directory
> passed.
> *****
> build/ALPHA_MOESI_CMP_token/tests/opt/quick/se/00.hello/alpha/linux/simple-timing-ruby-MOESI_CMP_token
> passed.
> *****
> build/ALPHA_MOESI_CMP_token/tests/opt/quick/se/00.hello/alpha/tru64/simple-timing-ruby-MOESI_CMP_token
> passed.
> *****
> build/ALPHA_MOESI_CMP_token/tests/opt/quick/se/50.memtest/alpha/linux/memtest-ruby-MOESI_CMP_token
> passed.
> *****
> build/ALPHA_MOESI_CMP_token/tests/opt/quick/se/60.rubytest/alpha/linux/rubytest-ruby-MOESI_CMP_token
> passed.
> ***** build/MIPS/tests/opt/quick/se/00.hello/mips/linux/inorder-timing
> passed.
> ***** build/MIPS/tests/opt/quick/se/00.hello/mips/linux/o3-timing passed.
> ***** build/MIPS/tests/opt/quick/se/00.hello/mips/linux/simple-atomic
> passed.
> ***** build/MIPS/tests/opt/quick/se/00.hello/mips/linux/simple-timing
> passed.
> ***** build/MIPS/tests/opt/quick/se/00.hello/mips/linux/simple-timing-ruby
> passed.
> ***** build/POWER/tests/opt/quick/se/00.hello/power/linux/o3-timing passed.
> ***** build/POWER/tests/opt/quick/se/00.hello/power/linux/simple-atomic
> passed.
> ***** build/SPARC/tests/opt/quick/se/00.hello/sparc/linux/inorder-timing
> passed.
> ***** build/SPARC/tests/opt/quick/se/00.hello/sparc/linux/simple-atomic
> passed.
> ***** build/SPARC/tests/opt/quick/se/00.hello/sparc/linux/simple-timing
> passed.
> *****
> build/SPARC/tests/opt/quick/se/00.hello/sparc/linux/simple-timing-ruby
> passed.
> ***** build/SPARC/tests/opt/quick/se/02.insttest/sparc/linux/o3-timing
> passed.
> *****
> build/SPARC/tests/opt/quick/se/02.insttest/sparc/linux/inorder-timing
> passed.
> ***** build/SPARC/tests/opt/quick/se/02.insttest/sparc/linux/simple-atomic
> passed.
> ***** build/SPARC/tests/opt/quick/se/02.insttest/sparc/linux/simple-timing
> passed.
> *****
> build/SPARC/tests/opt/quick/se/40.m5threads-test-atomic/sparc/linux/simple-atomic-mp
> passed.
> *****
> build/SPARC/tests/opt/quick/se/40.m5threads-test-atomic/sparc/linux/o3-timing-mp
> passed.
> *****
> build/SPARC/tests/opt/quick/se/40.m5threads-test-atomic/sparc/linux/simple-timing-mp
> passed.
> ***** build/X86/tests/opt/quick/se/00.hello/x86/linux/o3-timing passed.
> ***** build/X86/tests/opt/quick/se/00.hello/x86/linux/simple-atomic passed.
> ***** build/X86/tests/opt/quick/se/00.hello/x86/linux/simple-timing-ruby
> passed.
> *****
> build/X86/tests/opt/quick/fs/10.linux-boot/x86/linux/pc-simple-atomic
> passed.
> *****
> build/X86/tests/opt/quick/fs/10.linux-boot/x86/linux/pc-simple-timing
> passed.scons: `build/X86_MESI_CMP_directory/tests/opt/quick/se' is up to
> date.
> ***** build/X86/tests/opt/quick/se/00.hello/x86/linux/simple-timing passed.
> ***** build/ARM/tests/opt/quick/se/00.hello/arm/linux/o3-timing-checker
> passed.
> ***** build/ARM/tests/opt/quick/se/00.hello/arm/linux/simple-atomic passed.
> *****
> build/ARM/tests/opt/quick/se/00.hello/arm/linux/simple-atomic-dummychecker
> passed.
> ***** build/ARM/tests/opt/quick/se/00.hello/arm/linux/simple-timing passed.
> *****
> build/ARM/tests/opt/quick/fs/10.linux-boot/arm/linux/realview-simple-timing-dual
> passed.
> *****
> build/ARM/tests/opt/quick/fs/10.linux-boot/arm/linux/realview-simple-atomic-dual
> passed.
> *****
> build/ARM/tests/opt/quick/fs/10.linux-boot/arm/linux/realview-simple-atomic
> passed.
> *****
> build/ARM/tests/opt/quick/fs/10.linux-boot/arm/linux/realview-simple-timing
> passed.
> ***** build/ARM/tests/opt/quick/se/00.hello/arm/linux/o3-timing passed.
>
> See /z/m5/regression/regress-2012-06-20-03:00:01 for details.
>
>
>
> ------------------------------
>
> Message: 6
> Date: Wed, 20 Jun 2012 09:10:47 -0000
> From: "Nilay Vaish" <[email protected]>
> To: "Nilay Vaish" <[email protected]>,  "Andreas Hansson"
>        <[email protected]>, "Default" <[email protected]>
> Subject: Re: [gem5-dev] Review Request: Bus: Replace tickNextIdle and
>        inRetry with a state variable
> Message-ID: <[email protected]>
> Content-Type: text/plain; charset="utf-8"
>
>
> -----------------------------------------------------------
> This is an automatically generated e-mail. To reply, visit:
> http://reviews.gem5.org/r/1264/#review2963
> -----------------------------------------------------------
>
>
>
> src/mem/bus.cc
> <http://reviews.gem5.org/r/1264/#comment3191>
>
>    This comment does not seem correct. In succeededTiming() there is an
> assert that state should be BUSY.
>
>
>
> src/mem/bus.cc
> <http://reviews.gem5.org/r/1264/#comment3190>
>
>    From the implementation of recvRetry() below, it seems that this check
> is not required.
>
>
>
> src/mem/bus.cc
> <http://reviews.gem5.org/r/1264/#comment3188>
>
>    You might want to remove the modulo operation here. You can replace the
> entire if block by --
>    now = ((now + clock - 1) / clock) * clock;
>
>
> - Nilay Vaish
>
>
> On June 8, 2012, 10:58 a.m., Andreas Hansson wrote:
> >
> > -----------------------------------------------------------
> > This is an automatically generated e-mail. To reply, visit:
> > http://reviews.gem5.org/r/1264/
> > -----------------------------------------------------------
> >
> > (Updated June 8, 2012, 10:58 a.m.)
> >
> >
> > Review request for Default.
> >
> >
> > Description
> > -------
> >
> > Changeset 9071:e6145aa18228
> > ---------------------------
> > Bus: Replace tickNextIdle and inRetry with a state variable
> >
> > This patch adds a state enum and member variable in the bus, tracking
> > the bus state, thus eliminating the need for tickNextIdle and inRetry,
> > and fixing an issue that allowed the bus to be occupied by multiple
> > packets at once (hopefully it also makes it easier to understand the
> > code).
> >
> > The bus, in its current form, uses tickNextIdle and inRetry to keep
> > track of the state of the bus. However, it only updates tickNextIdle
> > _after_ forwarding a packet using sendTiming, and the result is that
> > the bus is still seen as idle, and a module that receives the packet
> > and starts transmitting new packets in zero time will still see the
> > bus as idle (and this is done by a number of DMA devices). The issue
> > can also be seen in isOccupied where the bus calls reschedule on an
> > event instead of schedule.
> >
> > This patch addresses the problem by marking the bus as _not_ idle
> > already by the time we conclude that the bus is not occupied and we
> > will deal with the packet.
> >
> > As a result of not allowing multiple packets to occupy the bus, some
> > regressions have slight changes in their statistics. A separate patch
> > updates these accordingly.
> >
> > Further ahead, a follow-on patch will introduce a separate state
> > variable for request/responses/snoop responses, and thus implement a
> > split request/response bus with separate flow control for the
> > different message types (even further ahead it will introduce a
> > multi-layer bus).
> >
> >
> > Diffs
> > -----
> >
> >   src/mem/bus.hh 35ac3a6f8ee0
> >   src/mem/bus.cc 35ac3a6f8ee0
> >   src/mem/coherent_bus.cc 35ac3a6f8ee0
> >   src/mem/noncoherent_bus.cc 35ac3a6f8ee0
> >
> > Diff: http://reviews.gem5.org/r/1264/diff/
> >
> >
> > Testing
> > -------
> >
> > util/regress all passing (disregarding t1000 and eio) with a few
> exception that exhibit stat differences, e.g.
> 10.linux-boot/alpha/linux/tsunami-simple-timing with a magnitude of <0.4%,
> fs/10.linux-boot/arm/linux/realview-simple-timing with <0.01%, and
> 10.linux-boot/x86/linux/pc-simple-timing with a max magnitude of +38%(!)
> >
> >
> > Thanks,
> >
> > Andreas Hansson
> >
> >
>
>
>
> ------------------------------
>
> Message: 7
> Date: Wed, 20 Jun 2012 09:21:52 -0000
> From: "Nilay Vaish" <[email protected]>
> To: "Nilay Vaish" <[email protected]>,  "Andreas Hansson"
>        <[email protected]>, "Default" <[email protected]>
> Subject: Re: [gem5-dev] Review Request: Port: Add protocol-agnostic
>        ports in        the port hierarchy
> Message-ID: <[email protected]>
> Content-Type: text/plain; charset="utf-8"
>
>
>
> > On June 18, 2012, 5:24 p.m., Nilay Vaish wrote:
> > > src/cpu/testers/rubytest/RubyTester.cc, line 138
> > > <http://reviews.gem5.org/r/1273/diff/1/?file=27443#file27443line138>
> > >
> > >     Why this change? read_idx is an index, and not a Port ID.
> >
> > Andreas Hansson wrote:
> >     The getMasterPort and getSlavePort function is based on a Port
> identifier, and although plenty modules choose to store these in a vector
> and map them 1:1 to indices, that is not required.
> >
> >     I hope that makes sense.
>
> Then, read_idx should be declared as a PortID as well.
>
>
> - Nilay
>
>
> -----------------------------------------------------------
> This is an automatically generated e-mail. To reply, visit:
> http://reviews.gem5.org/r/1273/#review2954
> -----------------------------------------------------------
>
>
> On June 17, 2012, 10:18 a.m., Andreas Hansson wrote:
> >
> > -----------------------------------------------------------
> > This is an automatically generated e-mail. To reply, visit:
> > http://reviews.gem5.org/r/1273/
> > -----------------------------------------------------------
> >
> > (Updated June 17, 2012, 10:18 a.m.)
> >
> >
> > Review request for Default.
> >
> >
> > Description
> > -------
> >
> > Changeset 9081:944fe8294fa3
> > ---------------------------
> > Port: Add protocol-agnostic ports in the port hierarchy
> >
> > This patch adds an additional level of ports in the inheritance
> > hierarchy, separating out the protocol-specific and protocl-agnostic
> > parts. All the functionality related to the binding of ports is now
> > confined to use BaseMaster/BaseSlavePorts, and all the
> > protocol-specific parts stay in the Master/SlavePort. In the future it
> > will be possible to add other protocol-specific implementations.
> >
> > The functions used in the binding of ports, i.e. getMaster/SlavePort
> > now use the base classes, and the index parameter is updated to use
> > the PortID typedef with the symbolic InvalidPortID as the default.
> >
> >
> > Diffs
> > -----
> >
> >   src/arch/arm/table_walker.hh fa77985a87c6
> >   src/arch/arm/table_walker.cc fa77985a87c6
> >   src/arch/arm/tlb.hh fa77985a87c6
> >   src/arch/arm/tlb.cc fa77985a87c6
> >   src/arch/x86/interrupts.hh fa77985a87c6
> >   src/arch/x86/pagetable_walker.hh fa77985a87c6
> >   src/arch/x86/pagetable_walker.cc fa77985a87c6
> >   src/arch/x86/tlb.hh fa77985a87c6
> >   src/arch/x86/tlb.cc fa77985a87c6
> >   src/cpu/base.hh fa77985a87c6
> >   src/cpu/base.cc fa77985a87c6
> >   src/cpu/testers/directedtest/RubyDirectedTester.hh fa77985a87c6
> >   src/cpu/testers/directedtest/RubyDirectedTester.cc fa77985a87c6
> >   src/cpu/testers/memtest/memtest.hh fa77985a87c6
> >   src/cpu/testers/memtest/memtest.cc fa77985a87c6
> >   src/cpu/testers/networktest/networktest.hh fa77985a87c6
> >   src/cpu/testers/networktest/networktest.cc fa77985a87c6
> >   src/cpu/testers/rubytest/RubyTester.hh fa77985a87c6
> >   src/cpu/testers/rubytest/RubyTester.cc fa77985a87c6
> >   src/dev/copy_engine.hh fa77985a87c6
> >   src/dev/copy_engine.cc fa77985a87c6
> >   src/dev/dma_device.hh fa77985a87c6
> >   src/dev/dma_device.cc fa77985a87c6
> >   src/dev/io_device.hh fa77985a87c6
> >   src/dev/io_device.cc fa77985a87c6
> >   src/dev/pcidev.hh fa77985a87c6
> >   src/dev/x86/i82094aa.hh fa77985a87c6
> >   src/mem/bridge.hh fa77985a87c6
> >   src/mem/bridge.cc fa77985a87c6
> >   src/mem/bus.hh fa77985a87c6
> >   src/mem/bus.cc fa77985a87c6
> >   src/mem/cache/base.hh fa77985a87c6
> >   src/mem/cache/base.cc fa77985a87c6
> >   src/mem/comm_monitor.hh fa77985a87c6
> >   src/mem/comm_monitor.cc fa77985a87c6
> >   src/mem/mem_object.hh fa77985a87c6
> >   src/mem/mem_object.cc fa77985a87c6
> >   src/mem/port.hh fa77985a87c6
> >   src/mem/port.cc fa77985a87c6
> >   src/mem/ruby/system/RubyPort.hh fa77985a87c6
> >   src/mem/ruby/system/RubyPort.cc fa77985a87c6
> >   src/mem/simple_mem.hh fa77985a87c6
> >   src/mem/simple_mem.cc fa77985a87c6
> >   src/python/swig/pyobject.cc fa77985a87c6
> >   src/sim/system.hh fa77985a87c6
> >   src/sim/system.cc fa77985a87c6
> >   src/sim/tlb.hh fa77985a87c6
> >
> > Diff: http://reviews.gem5.org/r/1273/diff/
> >
> >
> > Testing
> > -------
> >
> > util/regress all passing (disregarding t1000 and eio)
> >
> >
> > Thanks,
> >
> > Andreas Hansson
> >
> >
>
>
>
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> End of gem5-dev Digest, Vol 62, Issue 50
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