-ExecSymbol Ali
On Jul 4, 2012, at 3:32 PM, Yanqi Zhou wrote: > How to print out instruction address in the trace file? > I turn on the flag --debug-flags=Exec when running a SPEC2006 benchmark. The > dumped trace file has runtime execution information such as cycles, > instruction symbolic addresses, alu results, and so on. Is there a way to > print out the real instruction address instead of the symbolic address? > > Thanks, > Zhou > ________________________________________ > From: [email protected] [[email protected]] on behalf of > [email protected] [[email protected]] > Sent: Wednesday, July 04, 2012 12:00 PM > To: [email protected] > Subject: gem5-dev Digest, Vol 63, Issue 9 > > Send gem5-dev mailing list submissions to > [email protected] > > To subscribe or unsubscribe via the World Wide Web, visit > http://m5sim.org/mailman/listinfo/gem5-dev > or, via email, send a message with subject or body 'help' to > [email protected] > > You can reach the person managing the list at > [email protected] > > When replying, please edit your Subject line so it is more specific > than "Re: Contents of gem5-dev digest..." > > > Today's Topics: > > 1. Re: Review Request: ARM: fix value of MISCREG_CTR returned by > readMiscReg() (Anthony Gutierrez) > 2. Re: Review Request: ARM: fix value of MISCREG_CTR returned by > readMiscReg() (Anthony Gutierrez) > 3. Cron <m5test@zizzer> /z/m5/regression/do-regression quick > (Cron Daemon) > > > ---------------------------------------------------------------------- > > Message: 1 > Date: Tue, 03 Jul 2012 21:41:20 -0000 > From: "Anthony Gutierrez" <[email protected]> > To: "Anthony Gutierrez" <[email protected]>, "Default" > <[email protected]> > Subject: Re: [gem5-dev] Review Request: ARM: fix value of MISCREG_CTR > returned by readMiscReg() > Message-ID: <[email protected]> > Content-Type: text/plain; charset="utf-8" > > > ----------------------------------------------------------- > This is an automatically generated e-mail. To reply, visit: > http://reviews.gem5.org/r/1117/ > ----------------------------------------------------------- > > (Updated July 3, 2012, 2:41 p.m.) > > > Review request for Default. > > > Description (updated) > ------- > > Changeset 9087:ed0af5edc21f > --------------------------- > ARM: fix value of MISCREG_CTR returned by readMiscReg() > > According to the A15 TRM the value of this register is as follows (assuming > 16 word = 64 byte lines) > [31:29] Format - b100 specifies v7 > [28] RAZ - b0 > [27:24] CWG log2(max writeback size #words) - 0x4 16 words > [23:20] ERG log2(max reservation size #words) - 0x4 16 words > [19:16] DminLine log2(smallest dcache line #words) - 0x4 16 words > [15:14] L1Ip L1 index/tagging policy - b11 specifies PIPT > [13:4] RAZ - b0000000000 > [3:0] IminLine log2(smallest icache line #words) - 0x4 16 words > > > Diffs (updated) > ----- > > src/arch/arm/isa.cc 5f0321c03a2602f34dd03700e41e0cf5b47b8761 > src/arch/arm/miscregs.hh 5f0321c03a2602f34dd03700e41e0cf5b47b8761 > > Diff: http://reviews.gem5.org/r/1117/diff/ > > > Testing > ------- > > Ran BBench with the mcr icimvau instruction implemented. There is kernel code > that relies on the proper implementation of this register when performing > cache maintenance operations see arch/arm/mm/cache-v7.S in the linux kernel > source. > > > Thanks, > > Anthony Gutierrez > > > > ------------------------------ > > Message: 2 > Date: Tue, 03 Jul 2012 21:51:35 -0000 > From: "Anthony Gutierrez" <[email protected]> > To: "Anthony Gutierrez" <[email protected]>, "Default" > <[email protected]> > Subject: Re: [gem5-dev] Review Request: ARM: fix value of MISCREG_CTR > returned by readMiscReg() > Message-ID: <[email protected]> > Content-Type: text/plain; charset="utf-8" > > > ----------------------------------------------------------- > This is an automatically generated e-mail. To reply, visit: > http://reviews.gem5.org/r/1117/ > ----------------------------------------------------------- > > (Updated July 3, 2012, 2:51 p.m.) > > > Review request for Default. > > > Description (updated) > ------- > > Changeset 9087:920818736f19 > --------------------------- > ARM: fix value of MISCREG_CTR returned by readMiscReg() > > According to the A15 TRM the value of this register is as follows (assuming > 16 word = 64 byte lines) > [31:29] Format - b100 specifies v7 > [28] RAZ - b0 > [27:24] CWG log2(max writeback size #words) - 0x4 16 words > [23:20] ERG log2(max reservation size #words) - 0x4 16 words > [19:16] DminLine log2(smallest dcache line #words) - 0x4 16 words > [15:14] L1Ip L1 index/tagging policy - b11 specifies PIPT > [13:4] RAZ - b0000000000 > [3:0] IminLine log2(smallest icache line #words) - 0x4 16 words > > > Diffs (updated) > ----- > > src/arch/arm/isa.cc 5f0321c03a2602f34dd03700e41e0cf5b47b8761 > src/arch/arm/miscregs.hh 5f0321c03a2602f34dd03700e41e0cf5b47b8761 > > Diff: http://reviews.gem5.org/r/1117/diff/ > > > Testing > ------- > > Ran BBench with the mcr icimvau instruction implemented. There is kernel code > that relies on the proper implementation of this register when performing > cache maintenance operations see arch/arm/mm/cache-v7.S in the linux kernel > source. > > > Thanks, > > Anthony Gutierrez > > > > ------------------------------ > > Message: 3 > Date: Wed, 04 Jul 2012 03:07:40 -0400 > From: [email protected] (Cron Daemon) > To: [email protected] > Subject: [gem5-dev] Cron <m5test@zizzer> > /z/m5/regression/do-regression quick > Message-ID: <E1SmJga-000716-1J@zizzer> > Content-Type: text/plain; charset=ANSI_X3.4-1968 > > ***** build/ALPHA/tests/opt/quick/se/20.eio-short/alpha/eio/simple-timing > FAILED! > ***** build/ALPHA/tests/opt/quick/se/20.eio-short/alpha/eio/simple-atomic > FAILED!***** > build/ALPHA/tests/opt/quick/se/30.eio-mp/alpha/eio/simple-atomic-mp FAILED! > ***** build/ALPHA/tests/opt/quick/se/30.eio-mp/alpha/eio/simple-timing-mp > FAILED! > scons: `build/ALPHA/gem5.debug' is up to date. > scons: `build/ALPHA_MOESI_hammer/gem5.debug' is up to date. > scons: `build/ALPHA_MESI_CMP_directory/gem5.debug' is up to date. > scons: `build/ALPHA_MOESI_CMP_directory/gem5.debug' is up to date. > scons: `build/ALPHA_MOESI_CMP_token/gem5.debug' is up to date. > scons: `build/MIPS/gem5.debug' is up to date. > scons: `build/POWER/gem5.debug' is up to date. > scons: `build/SPARC/gem5.debug' is up to date. > scons: `build/X86/gem5.debug' is up to date. > scons: `build/X86_MESI_CMP_directory/gem5.debug' is up to date. > scons: `build/ARM/gem5.debug' is up to date. > scons: `build/ALPHA/gem5.fast' is up to date. > scons: `build/ALPHA_MOESI_hammer/gem5.fast' is up to date. > scons: `build/ALPHA_MESI_CMP_directory/gem5.fast' is up to date. > scons: `build/ALPHA_MOESI_CMP_directory/gem5.fast' is up to date. > scons: `build/ALPHA_MOESI_CMP_token/gem5.fast' is up to date. > scons: `build/MIPS/gem5.fast' is up to date. > scons: `build/POWER/gem5.fast' is up to date. > scons: `build/SPARC/gem5.fast' is up to date. > scons: `build/X86/gem5.fast' is up to date. > scons: `build/X86_MESI_CMP_directory/gem5.fast' is up to date. > scons: `build/ARM/gem5.fast' is up to date. > scons: `build/ALPHA_MOESI_hammer/tests/opt/quick/fs' is up to date. > scons: `build/ALPHA_MESI_CMP_directory/tests/opt/quick/fs' is up to date. > scons: `build/ALPHA_MOESI_CMP_directory/tests/opt/quick/fs' is up to date. > scons: `build/ALPHA_MOESI_CMP_token/tests/opt/quick/fs' is up to date. > scons: `build/MIPS/tests/opt/quick/fs' is up to date. > scons: `build/POWER/tests/opt/quick/fs' is up to date. > scons: `build/X86_MESI_CMP_directory/tests/opt/quick/se' is up to date. > scons: `build/X86_MESI_CMP_directory/tests/opt/quick/fs' is up to date. > ***** build/ALPHA/tests/opt/quick/se/00.hello/alpha/linux/simple-timing-ruby > passed. > ***** build/ALPHA/tests/opt/quick/se/00.hello/alpha/linux/simple-timing > passed. > ***** build/ALPHA/tests/opt/quick/se/00.hello/alpha/linux/inorder-timing > passed. > ***** build/ALPHA/tests/opt/quick/se/00.hello/alpha/linux/o3-timing passed. > ***** build/ALPHA/tests/opt/quick/se/00.hello/alpha/tru64/simple-timing-ruby > passed. > ***** build/ALPHA/tests/opt/quick/se/00.hello/alpha/linux/simple-atomic > passed. > ***** build/ALPHA/tests/opt/quick/se/00.hello/alpha/tru64/o3-timing passed. > ***** build/ALPHA/tests/opt/quick/se/01.hello-2T-smt/alpha/linux/o3-timing > passed. > ***** build/ALPHA/tests/opt/quick/se/00.hello/alpha/tru64/simple-timing > passed. > ***** build/ALPHA/tests/opt/quick/se/50.memtest/alpha/linux/memtest passed. > ***** build/ALPHA/tests/opt/quick/se/50.memtest/alpha/linux/memtest-ruby > passed.***** > build/ALPHA/tests/opt/quick/se/00.hello/alpha/tru64/simple-atomic > passed.***** > build/ALPHA/tests/opt/quick/se/60.rubytest/alpha/linux/rubytest-ruby passed. > ***** > build/ALPHA/tests/opt/quick/fs/10.linux-boot/alpha/linux/tsunami-simple-atomic > passed. > ***** > build/ALPHA/tests/opt/quick/fs/10.linux-boot/alpha/linux/tsunami-simple-atomic-dual > passed. > ***** > build/ALPHA/tests/opt/quick/fs/10.linux-boot/alpha/linux/tsunami-simple-timing > passed. > ***** > build/ALPHA/tests/opt/quick/fs/10.linux-boot/alpha/linux/tsunami-simple-timing-dual > passed. > ***** > build/ALPHA/tests/opt/quick/fs/80.netperf-stream/alpha/linux/twosys-tsunami-simple-atomic > passed. > ***** > build/ALPHA_MOESI_hammer/tests/opt/quick/se/00.hello/alpha/tru64/simple-timing-ruby-MOESI_hammer > passed. > ***** > build/ALPHA_MOESI_hammer/tests/opt/quick/se/00.hello/alpha/linux/simple-timing-ruby-MOESI_hammer > passed. > ***** > build/ALPHA_MOESI_hammer/tests/opt/quick/se/50.memtest/alpha/linux/memtest-ruby-MOESI_hammer > passed. > ***** > build/ALPHA_MOESI_hammer/tests/opt/quick/se/60.rubytest/alpha/linux/rubytest-ruby-MOESI_hammer > passed. > ***** > build/ALPHA_MESI_CMP_directory/tests/opt/quick/se/00.hello/alpha/linux/simple-timing-ruby-MESI_CMP_directory > passed. > ***** > build/ALPHA_MESI_CMP_directory/tests/opt/quick/se/00.hello/alpha/tru64/simple-timing-ruby-MESI_CMP_directory > passed. > ***** > build/ALPHA_MESI_CMP_directory/tests/opt/quick/se/50.memtest/alpha/linux/memtest-ruby-MESI_CMP_directory > passed. > ***** > build/ALPHA_MESI_CMP_directory/tests/opt/quick/se/60.rubytest/alpha/linux/rubytest-ruby-MESI_CMP_directory > passed. > ***** > build/ALPHA_MOESI_CMP_directory/tests/opt/quick/se/00.hello/alpha/linux/simple-timing-ruby-MOESI_CMP_directory > passed. > ***** > build/ALPHA_MOESI_CMP_directory/tests/opt/quick/se/00.hello/alpha/tru64/simple-timing-ruby-MOESI_CMP_directory > passed. > ***** > build/ALPHA_MOESI_CMP_directory/tests/opt/quick/se/50.memtest/alpha/linux/memtest-ruby-MOESI_CMP_directory > passed. > ***** > build/ALPHA_MOESI_CMP_directory/tests/opt/quick/se/60.rubytest/alpha/linux/rubytest-ruby-MOESI_CMP_directory > passed. > ***** > build/ALPHA_MOESI_CMP_token/tests/opt/quick/se/00.hello/alpha/linux/simple-timing-ruby-MOESI_CMP_token > passed. > ***** > build/ALPHA_MOESI_CMP_token/tests/opt/quick/se/00.hello/alpha/tru64/simple-timing-ruby-MOESI_CMP_token > passed. > ***** > build/ALPHA_MOESI_CMP_token/tests/opt/quick/se/50.memtest/alpha/linux/memtest-ruby-MOESI_CMP_token > passed. > ***** > build/ALPHA_MOESI_CMP_token/tests/opt/quick/se/60.rubytest/alpha/linux/rubytest-ruby-MOESI_CMP_token > passed. > ***** build/MIPS/tests/opt/quick/se/00.hello/mips/linux/inorder-timing passed. > ***** build/MIPS/tests/opt/quick/se/00.hello/mips/linux/o3-timing passed. > ***** build/MIPS/tests/opt/quick/se/00.hello/mips/linux/simple-atomic passed. > ***** build/MIPS/tests/opt/quick/se/00.hello/mips/linux/simple-timing-ruby > passed. > ***** build/MIPS/tests/opt/quick/se/00.hello/mips/linux/simple-timing passed. > ***** build/POWER/tests/opt/quick/se/00.hello/power/linux/o3-timing passed. > ***** build/POWER/tests/opt/quick/se/00.hello/power/linux/simple-atomic > passed. > ***** build/SPARC/tests/opt/quick/se/00.hello/sparc/linux/inorder-timing > passed. > ***** build/SPARC/tests/opt/quick/se/00.hello/sparc/linux/simple-atomic > passed. > ***** build/SPARC/tests/opt/quick/se/00.hello/sparc/linux/simple-timing-ruby > passed. > ***** build/SPARC/tests/opt/quick/se/02.insttest/sparc/linux/inorder-timing > passed. > ***** build/SPARC/tests/opt/quick/se/02.insttest/sparc/linux/o3-timing passed. > ***** build/SPARC/tests/opt/quick/se/02.insttest/sparc/linux/simple-atomic > passed. > ***** build/SPARC/tests/opt/quick/se/00.hello/sparc/linux/simple-timing > passed. > ***** build/SPARC/tests/opt/quick/se/02.insttest/sparc/linux/simple-timing > passed. > ***** > build/SPARC/tests/opt/quick/se/40.m5threads-test-atomic/sparc/linux/simple-atomic-mp > passed. > ***** > build/SPARC/tests/opt/quick/se/40.m5threads-test-atomic/sparc/linux/simple-timing-mp > passed. > ***** > build/SPARC/tests/opt/quick/se/40.m5threads-test-atomic/sparc/linux/o3-timing-mp > passed. > ***** build/X86/tests/opt/quick/se/00.hello/x86/linux/simple-timing passed. > ***** build/X86/tests/opt/quick/se/00.hello/x86/linux/simple-atomic passed. > ***** build/X86/tests/opt/quick/se/00.hello/x86/linux/o3-timing passed. > ***** build/X86/tests/opt/quick/se/00.hello/x86/linux/simple-timing-ruby > passed. > ***** build/X86/tests/opt/quick/fs/10.linux-boot/x86/linux/pc-simple-atomic > passed. > ***** build/X86/tests/opt/quick/fs/10.linux-boot/x86/linux/pc-simple-timing > passed. > ***** build/ARM/tests/opt/quick/se/00.hello/arm/linux/o3-timing passed. > ***** build/ARM/tests/opt/quick/se/00.hello/arm/linux/o3-timing-checker > passed. > ***** build/ARM/tests/opt/quick/se/00.hello/arm/linux/simple-atomic passed. > ***** build/ARM/tests/opt/quick/se/00.hello/arm/linux/simple-timing passed. > ***** > build/ARM/tests/opt/quick/se/00.hello/arm/linux/simple-atomic-dummychecker > passed. > ***** > build/ARM/tests/opt/quick/fs/10.linux-boot/arm/linux/realview-simple-atomic > passed. > ***** > build/ARM/tests/opt/quick/fs/10.linux-boot/arm/linux/realview-simple-timing > passed. > ***** > build/ARM/tests/opt/quick/fs/10.linux-boot/arm/linux/realview-simple-atomic-dual > passed. > ***** > build/ARM/tests/opt/quick/fs/10.linux-boot/arm/linux/realview-simple-timing-dual > passed. > > See /z/m5/regression/regress-2012-07-04-03:00:01 for details. > > > > ------------------------------ > > _______________________________________________ > gem5-dev mailing list > [email protected] > http://m5sim.org/mailman/listinfo/gem5-dev > > > End of gem5-dev Digest, Vol 63, Issue 9 > *************************************** > _______________________________________________ > gem5-dev mailing list > [email protected] > http://m5sim.org/mailman/listinfo/gem5-dev > _______________________________________________ gem5-dev mailing list [email protected] http://m5sim.org/mailman/listinfo/gem5-dev
