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Ship it! Ship It! - Andreas Hansson On July 19, 2012, 2:31 p.m., Anthony Gutierrez wrote: > > ----------------------------------------------------------- > This is an automatically generated e-mail. To reply, visit: > http://reviews.gem5.org/r/1313/ > ----------------------------------------------------------- > > (Updated July 19, 2012, 2:31 p.m.) > > > Review request for Default. > > > Description > ------- > > Changeset 9121:233e4cf15fc4 > --------------------------- > checker cpu: make checker cpu id match its host's cpu id > > when using the checker i ran into problems where an instruction reading the > cpu id register failed because the ids did not match, and hence, the result > of the instruction did not match. this patch ensures that the ids match so > this instruction does not fail. this problem only seemed to manifest itself > when multiple cores were in the system, either multi-core, or extra switched- > out cores present in the system. > > > Diffs > ----- > > src/cpu/o3/O3CPU.py 48eeef8a0997fd97ede789b5a32c03bf846022f1 > > Diff: http://reviews.gem5.org/r/1313/diff/ > > > Testing > ------- > > ran arm_detailed CPU with -n --checker. the mrc instruction reading the CPU's > id no longer mismatches, causing simulation to panic. > > > Thanks, > > Anthony Gutierrez > > _______________________________________________ gem5-dev mailing list [email protected] http://m5sim.org/mailman/listinfo/gem5-dev
