----------------------------------------------------------- This is an automatically generated e-mail. To reply, visit: http://reviews.gem5.org/r/1316/ -----------------------------------------------------------
Review request for Default. Description ------- Changeset 9133:b6a0e6f32336 --------------------------- DMA: Refactor the DMA device and align timing and atomic This patch does a bunch of house-keeping updates on the DMA, including indentation, and formatting, but most importantly breaks out the response handling such that it can be shared between the atomic and timing modes. It also removes a potential bug caused by the atomic handling of responses only deleting the allocated request (pkt->req) once the DMA action completes instead of doing so for every packet. Before this patch, the handling of responses was near identical for atomic and timing, but the code was simply duplicated. With this patch, the handleResp method deals with the responses in both cases. There are further updates to make after removing the NACKs, but that will be part of a separate follow-up patch. This patch does not change the behaviour of any regression. Diffs ----- src/dev/Device.py 2f6f0631af48 src/dev/dma_device.hh 2f6f0631af48 src/dev/dma_device.cc 2f6f0631af48 Diff: http://reviews.gem5.org/r/1316/diff/ Testing ------- util/regress all passing (disregarding t1000 and eio) Thanks, Andreas Hansson _______________________________________________ gem5-dev mailing list [email protected] http://m5sim.org/mailman/listinfo/gem5-dev
