> On July 26, 2012, 6:08 a.m., Nathan Binkert wrote: > > src/base/types.hh, line 55 > > <http://reviews.gem5.org/r/1320/diff/1/?file=28245#file28245line55> > > > > Are we sure that this is no longer the case? > > Andreas Hansson wrote: > All the regressions work :), if someone knows what the issue was I'd be > keen to know more.
I don't know for sure, but it could be a matter of doing a subtraction and checking for a negative result... however this code here looks safe, so maybe that's been taken care of: http://repo.gem5.org/gem5/file/b57966a6c512/src/mem/cache/tags/lru.cc#l130 - Steve ----------------------------------------------------------- This is an automatically generated e-mail. To reply, visit: http://reviews.gem5.org/r/1320/#review3144 ----------------------------------------------------------- On July 26, 2012, 6:51 a.m., Andreas Hansson wrote: > > ----------------------------------------------------------- > This is an automatically generated e-mail. To reply, visit: > http://reviews.gem5.org/r/1320/ > ----------------------------------------------------------- > > (Updated July 26, 2012, 6:51 a.m.) > > > Review request for Default. > > > Description > ------- > > Changeset 9133:93d82aae1592 > --------------------------- > Clock: Make Tick unsigned and remove UTick > > This patch makes the Tick unsigned and removes the UTick typedef. The > ticks should never be negative, and there was only one major issue > with removing it, caused by the o3 CPU using a -1 as an initial value. > > The patch has no impact on any regressions. > > > Diffs > ----- > > src/base/types.hh b57966a6c512 > src/cpu/o3/cpu.cc b57966a6c512 > src/sim/eventq.hh b57966a6c512 > > Diff: http://reviews.gem5.org/r/1320/diff/ > > > Testing > ------- > > util/regress all passing (disregarding t1000 and eio) > > > Thanks, > > Andreas Hansson > > _______________________________________________ gem5-dev mailing list [email protected] http://m5sim.org/mailman/listinfo/gem5-dev
