I've asked Tony to come up with a solution to this. Ali
On Jul 30, 2012, at 7:29 AM, Andreas Hansson wrote: > Hi all, > > I just noticed that the changeset: > > changeset: 9130:8423aa8c2216 > user: Anthony Gutierrez <[email protected]> > date: Fri Jul 27 16:08:04 2012 -0400 > summary: ARM: fix value of MISCREG_CTR returned by readMiscReg() > > breaks the regression: > > > ***** build/ARM/tests/opt/long/fs/10.linux-boot/arm/linux/realview-o3-checker > FAILED! > > It tries to read of the peer block size from a checker that has no "proper" > inst port and hence no neighbour. > > It would be great if this could be resolved. > > As a minor note I think this once again highlights the needs for a "CPU" > wrapper object that contains both the cores and the caches. > > Thanks, > > Andreas > > > > -- IMPORTANT NOTICE: The contents of this email and any attachments are > confidential and may also be privileged. If you are not the intended > recipient, please notify the sender immediately and do not disclose the > contents to any other person, use it for any purpose, or store or copy the > information in any medium. Thank you. > _______________________________________________ > gem5-dev mailing list > [email protected] > http://m5sim.org/mailman/listinfo/gem5-dev > _______________________________________________ gem5-dev mailing list [email protected] http://m5sim.org/mailman/listinfo/gem5-dev
