----------------------------------------------------------- This is an automatically generated e-mail. To reply, visit: http://reviews.gem5.org/r/1089/ -----------------------------------------------------------
(Updated Aug. 19, 2012, 11:28 p.m.) Review request for Default. Description ------- inorder: add timing translation This is Erik Tomusk's patch to add timing translation to InOrder. It's the next step in getting InOrder to work for ARM. Diffs ----- configs/common/Simulation.py a7a72f42919e src/cpu/inorder/SConscript a7a72f42919e src/cpu/inorder/cpu.hh a7a72f42919e src/cpu/inorder/cpu.cc a7a72f42919e src/cpu/inorder/inorder_dyn_inst.hh a7a72f42919e src/cpu/inorder/inorder_dyn_inst.cc a7a72f42919e src/cpu/inorder/resource.cc a7a72f42919e src/cpu/inorder/resources/cache_unit.hh a7a72f42919e src/cpu/inorder/resources/cache_unit.cc a7a72f42919e src/cpu/inorder/resources/fetch_unit.hh a7a72f42919e src/cpu/inorder/resources/fetch_unit.cc a7a72f42919e src/cpu/inorder/resources/graduation_unit.cc a7a72f42919e src/cpu/inorder/resources/inorder_translation.hh PRE-CREATION src/cpu/inorder/resources/inorder_translation.cc PRE-CREATION src/cpu/translation.hh a7a72f42919e Diff: http://reviews.gem5.org/r/1089/diff/ Testing (updated) ------- This passes the alpha-hello world regression - Latest update fixed memory leak bug - It also fixes bug that did not correctly handle memory requests that were blocked (the doTLBAccess was always setting the request as completed, however this is not always the case). Thanks, Korey Sewell _______________________________________________ gem5-dev mailing list [email protected] http://m5sim.org/mailman/listinfo/gem5-dev
