> On Aug. 25, 2012, 6:07 a.m., Ali Saidi wrote: > > src/cpu/checker/cpu.hh, line 1 > > <http://reviews.gem5.org/r/1371/diff/1/?file=29204#file29204line1> > > > > oops
That's what happens when you are on dodgy X session over 3G :) > On Aug. 25, 2012, 6:07 a.m., Ali Saidi wrote: > > src/cpu/checker/cpu.hh, line 126 > > <http://reviews.gem5.org/r/1371/diff/1/?file=29204#file29204line126> > > > > assert icache Port? Both will do. I guess I am used to the old-school SPARC machines where NULL was 0x4 instead of 0x0...I'm not sure we have to design for that though. Will bump - Andreas ----------------------------------------------------------- This is an automatically generated e-mail. To reply, visit: http://reviews.gem5.org/r/1371/#review3322 ----------------------------------------------------------- On Aug. 25, 2012, 4:01 a.m., Andreas Hansson wrote: > > ----------------------------------------------------------- > This is an automatically generated e-mail. To reply, visit: > http://reviews.gem5.org/r/1371/ > ----------------------------------------------------------- > > (Updated Aug. 25, 2012, 4:01 a.m.) > > > Review request for Default. > > > Description > ------- > > Changeset 9168:8bc6ce06d039 > --------------------------- > Checker: Fix checker CPU ports > > This patch updates how the checker CPU handles the ports such that the > regressions will once again run without causing a panic. > > A minor amount of tidying up was also done as part of this patch. > > > Diffs > ----- > > src/cpu/checker/cpu.hh 1d983855df2c > src/cpu/checker/cpu.cc 1d983855df2c > > Diff: http://reviews.gem5.org/r/1371/diff/ > > > Testing > ------- > > Ran the failing realview-o3-checker regression with stats from next patch > > > Thanks, > > Andreas Hansson > > _______________________________________________ gem5-dev mailing list [email protected] http://m5sim.org/mailman/listinfo/gem5-dev
