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(Updated Aug. 27, 2012, 11:25 a.m.) Review request for Default. Description (updated) ------- Changeset 9177:458faeb1b6d6 --------------------------- Clock: Rework clocks to avoid tick-to-cycle transformations This patch introduces the notion of a clock update function that aims to avoid costly divisions when turning the current tick into a cycle. Each clocked object advances a private (hidden) cycle member and a tick member and uses these to implement functions for getting the tick of the next cycle, or the tick of a cycle some time in the future. In the different modules using the clocks, changes are made to avoid counting in ticks only to later translate to cycles. There are a few oddities in how the O3 and inorder CPU count idle cycles, as seen by a few locations where a cycle is subtracted in the calculation. This is done such that the regression does not change any stats, but should be revisited in a future patch. Another, much needed, change that is not done as part of this patch is to introduce a new typedef uint64_t Cycle to be able to at least hint at the unit of the variables counting Ticks vs Cycles. This will be done as a follow-up patch. As an additional follow up, the thread context still uses ticks for the book keeping of last activate and last suspend and this should probably also be changed into cycles as well. Diffs (updated) ----- src/arch/arm/table_walker.cc 2f2e4582014f src/arch/x86/mmapped_ipr.hh 2f2e4582014f src/cpu/base.cc 2f2e4582014f src/cpu/inorder/cpu.hh 2f2e4582014f src/cpu/inorder/cpu.cc 2f2e4582014f src/cpu/inorder/resource.cc 2f2e4582014f src/cpu/inorder/resource_pool.cc 2f2e4582014f src/cpu/o3/O3CPU.py 2f2e4582014f src/cpu/o3/commit.hh 2f2e4582014f src/cpu/o3/commit_impl.hh 2f2e4582014f src/cpu/o3/cpu.hh 2f2e4582014f src/cpu/o3/cpu.cc 2f2e4582014f src/cpu/o3/fetch_impl.hh 2f2e4582014f src/cpu/o3/inst_queue_impl.hh 2f2e4582014f src/cpu/o3/lsq_unit.hh 2f2e4582014f src/cpu/simple/atomic.cc 2f2e4582014f src/cpu/simple/timing.hh 2f2e4582014f src/cpu/simple/timing.cc 2f2e4582014f src/cpu/testers/memtest/memtest.cc 2f2e4582014f src/cpu/testers/networktest/networktest.cc 2f2e4582014f src/dev/arm/pl111.cc 2f2e4582014f src/dev/i8254xGBe.cc 2f2e4582014f src/dev/ns_gige.cc 2f2e4582014f src/sim/clocked_object.hh 2f2e4582014f Diff: http://reviews.gem5.org/r/1321/diff/ Testing ------- util/regress all passing (disregarding t1000 and eio) A minor update. This change did improve performance. Running the full regression, including a clean compile of all the ISAs went down by 8%. Note that this includes the time for building as well. Thanks, Andreas Hansson _______________________________________________ gem5-dev mailing list [email protected] http://m5sim.org/mailman/listinfo/gem5-dev
