changeset 4f54b0f229b5 in /z/repo/gem5
details: http://repo.gem5.org/gem5?cmd=changeset;node=4f54b0f229b5
description:
Standard Switch: Drain the system before switching CPUs
When switching from an atomic CPU to any of the timing CPUs, a drain is
unnecessary since no events are scheduled in atomic mode. However, when
trying to switch CPUs starting with a timing CPU, there may be events
scheduled. This change ensures that all events are drained from the
system
by calling m5.drain before switching CPUs.
diffstat:
configs/common/Simulation.py | 3 ++-
src/python/m5/simulate.py | 1 -
2 files changed, 2 insertions(+), 2 deletions(-)
diffs (31 lines):
diff -r 37e6eb40cf91 -r 4f54b0f229b5 configs/common/Simulation.py
--- a/configs/common/Simulation.py Wed Sep 12 21:40:28 2012 -0500
+++ b/configs/common/Simulation.py Wed Sep 12 21:41:37 2012 -0500
@@ -453,6 +453,7 @@
# manually. You DON'T need to resume after just switching
# CPUs if you haven't changed anything on the system level.
+ m5.doDrain(testsys)
m5.changeToTiming(testsys)
m5.switchCpus(switch_cpu_list)
m5.resume(testsys)
@@ -469,7 +470,7 @@
print "Switching CPUS @ tick %s" % (m5.curTick())
print "Simulation ends instruction count:%d" % \
(testsys.switch_cpus_1[0].max_insts_any_thread)
- m5.drain(testsys)
+ m5.doDrain(testsys)
m5.switchCpus(switch_cpu_list1)
m5.resume(testsys)
diff -r 37e6eb40cf91 -r 4f54b0f229b5 src/python/m5/simulate.py
--- a/src/python/m5/simulate.py Wed Sep 12 21:40:28 2012 -0500
+++ b/src/python/m5/simulate.py Wed Sep 12 21:41:37 2012 -0500
@@ -203,7 +203,6 @@
(type(system), objects.Root, objects.System)
if system.getMemoryMode() != objects.params.timing:
- doDrain(system)
print "Changing memory mode to timing"
for obj in system.descendants():
obj.changeTiming(objects.params.timing)
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