changeset f14188a5a1d6 in /z/repo/gem5
details: http://repo.gem5.org/gem5?cmd=changeset;node=f14188a5a1d6
description:
arm: Use a static_assert to test that miscRegName[] is complete
Instead of statically defining miscRegName to contain NUM_MISCREGS
elements, let the compiler determine the length of the array. This
allows us to use a static_assert to test that all registers are listed
in the name vector.
diffstat:
src/arch/arm/miscregs.hh | 6 +++++-
1 files changed, 5 insertions(+), 1 deletions(-)
diffs (30 lines):
diff -r 60f043573a65 -r f14188a5a1d6 src/arch/arm/miscregs.hh
--- a/src/arch/arm/miscregs.hh Tue Sep 25 11:49:40 2012 -0500
+++ b/src/arch/arm/miscregs.hh Tue Sep 25 11:49:40 2012 -0500
@@ -43,6 +43,7 @@
#define __ARCH_ARM_MISCREGS_HH__
#include "base/bitunion.hh"
+#include "base/compiler.hh"
namespace ArmISA
{
@@ -250,7 +251,7 @@
unsigned crm, unsigned opc2);
- const char * const miscRegName[NUM_MISCREGS] = {
+ const char * const miscRegName[] = {
"cpsr", "cpsr_q", "spsr", "spsr_fiq", "spsr_irq", "spsr_svc",
"spsr_mon", "spsr_und", "spsr_abt",
"fpsr", "fpsid", "fpscr", "fpscr_qc", "fpscr_exc", "fpexc",
@@ -325,6 +326,9 @@
"nop", "raz"
};
+ static_assert(sizeof(miscRegName) / sizeof(*miscRegName) == NUM_MISCREGS,
+ "The miscRegName array and NUM_MISCREGS are inconsistent.");
+
BitUnion32(CPSR)
Bitfield<31,30> nz;
Bitfield<29> c;
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