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Review request for Default. Description ------- Changeset 9381:54a3457d08f1 --------------------------- mem: Add interleaving bits to the address ranges This patch adds support for interleaving bits for the address ranges. What was previously just a start and end address, now has an additional three fields, for the high bit, and number of bits to use for interleaving, and a match value to compare against. If the number of interleaving bits is set to zero it is effectively disabled. A number of convenience functions are added to the range to enquire about the interleaving, its granularity and the number of stripes it is part of. Diffs ----- src/base/addr_range.hh 844f9e724343 src/base/addr_range_map.hh 844f9e724343 src/mem/physical.cc 844f9e724343 src/python/m5/params.py 844f9e724343 Diff: http://reviews.gem5.org/r/1583/diff/ Testing ------- util/regress all passing (disregarding t1000 and eio) Thanks, Andreas Hansson _______________________________________________ gem5-dev mailing list [email protected] http://m5sim.org/mailman/listinfo/gem5-dev
