changeset 93389c3d9195 in /z/repo/gem5
details: http://repo.gem5.org/gem5?cmd=changeset;node=93389c3d9195
description:
mem: Separate out the different cases for DRAM bus busy time
This patch changes how the data bus busy time is calculated such that
it is delayed to the actual scheduling time of the request as opposed
to being done as soon as possible.
This patch changes a bunch of statistics, and the stats update is
bundled together with the introruction of tFAW/tTAW and the named DRAM
configurations like DDR3 and LPDDR2.
diffstat:
src/mem/simple_dram.cc | 17 ++++++++---------
1 files changed, 8 insertions(+), 9 deletions(-)
diffs (47 lines):
diff -r 569e1f1d762d -r 93389c3d9195 src/mem/simple_dram.cc
--- a/src/mem/simple_dram.cc Mon Jan 28 20:19:42 2013 -0500
+++ b/src/mem/simple_dram.cc Thu Jan 31 07:49:13 2013 -0500
@@ -299,13 +299,16 @@
if (pageMgmt == Enums::open) {
bank.openRow = dram_pkt->row;
- bank.freeAt = schedTime + tBURST + accessLat;
+ bank.freeAt = schedTime + tBURST + std::max(accessLat, tCL);
+ busBusyUntil = bank.freeAt - tCL;
- if (!rowHitFlag)
+ if (!rowHitFlag) {
bank.tRASDoneAt = bank.freeAt + tRP;
-
+ busBusyUntil = bank.freeAt - tCL - tRCD;
+ }
} else if (pageMgmt == Enums::close) {
bank.freeAt = schedTime + tBURST + accessLat + tRP + tRP;
+ busBusyUntil = bank.freeAt - tRP - tRP - tCL - tRCD;
DPRINTF(DRAMWR, "processWriteEvent::bank.freeAt for "
"banks_id %d is %lld\n",
dram_pkt->rank * banksPerRank + dram_pkt->bank,
@@ -313,13 +316,8 @@
} else
panic("Unknown page management policy chosen\n");
- // @todo: As of now, write goes on the databus asap, maybe
- // be held up at bank. May want to change it to delay the
- // schedTime itself.
- busBusyUntil = schedTime + tBURST;
DPRINTF(DRAMWR,"Done writing to address %lld\n",dram_pkt->addr);
-
DPRINTF(DRAMWR,"schedtime is %lld, tBURST is %lld, "
"busbusyuntil is %lld\n",
schedTime, tBURST, busBusyUntil);
@@ -781,7 +779,8 @@
} else
panic("No page management policy chosen\n");
- DPRINTF(DRAM, "Returning %lld from estimateLatency()\n",accLat);
+ DPRINTF(DRAM, "Returning < %lld, %lld > from estimateLatency()\n",
+ bankLat, accLat);
return make_pair(bankLat, accLat);
}
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