changeset 28d88a0fda74 in /z/repo/gem5
details: http://repo.gem5.org/gem5?cmd=changeset;node=28d88a0fda74
description:
ruby: record fully busy cycle with in the controller
This patch does several things. First, the counter for fully busy
cycles for a
controller is now kept with in the controller, instead of being part of
the profiler.
Second, the topology class no longer keeps an array of controllers
which was only
used for printing stats. Instead, ruby system will now ask each
controller to print
the stats. Thirdly, the statistical variable for recording how many
different types
were created is being moved in to the controller from the profiler.
Note that for
printing, the profiler will collate results from different controllers.
diffstat:
src/mem/protocol/MOESI_CMP_directory.slicc | 2 +-
src/mem/ruby/common/Global.cc | 3 +
src/mem/ruby/common/Global.hh | 6 +
src/mem/ruby/network/Topology.cc | 19 +-
src/mem/ruby/network/Topology.hh | 3 -
src/mem/ruby/network/garnet/BaseGarnetNetwork.cc | 1 -
src/mem/ruby/network/simple/SimpleNetwork.cc | 2 -
src/mem/ruby/profiler/Profiler.cc | 118 +++++-----
src/mem/ruby/profiler/Profiler.hh | 7 +-
src/mem/ruby/slicc_interface/AbstractController.cc | 27 ++-
src/mem/ruby/slicc_interface/AbstractController.hh | 22 +-
src/mem/ruby/slicc_interface/RubySlicc_Profiler_interface.cc | 10 -
src/mem/ruby/slicc_interface/RubySlicc_Profiler_interface.hh | 4 -
src/mem/ruby/system/MachineID.hh | 6 +-
src/mem/ruby/system/System.cc | 22 +-
src/mem/slicc/symbols/StateMachine.py | 9 +-
16 files changed, 155 insertions(+), 106 deletions(-)
diffs (truncated from 562 to 300 lines):
diff -r ff4b1bde5f60 -r 28d88a0fda74 src/mem/protocol/MOESI_CMP_directory.slicc
--- a/src/mem/protocol/MOESI_CMP_directory.slicc Sun Feb 10 13:23:56
2013 +0100
+++ b/src/mem/protocol/MOESI_CMP_directory.slicc Sun Feb 10 21:26:22
2013 -0600
@@ -1,7 +1,7 @@
protocol "MOESI_CMP_directory";
include "RubySlicc_interfaces.slicc";
include "MOESI_CMP_directory-msg.sm";
+include "MOESI_CMP_directory-L1cache.sm";
include "MOESI_CMP_directory-L2cache.sm";
-include "MOESI_CMP_directory-L1cache.sm";
include "MOESI_CMP_directory-dma.sm";
include "MOESI_CMP_directory-dir.sm";
diff -r ff4b1bde5f60 -r 28d88a0fda74 src/mem/ruby/common/Global.cc
--- a/src/mem/ruby/common/Global.cc Sun Feb 10 13:23:56 2013 +0100
+++ b/src/mem/ruby/common/Global.cc Sun Feb 10 21:26:22 2013 -0600
@@ -28,4 +28,7 @@
#include "mem/ruby/common/Global.hh"
+using namespace std;
+
RubySystem* g_system_ptr = 0;
+vector<map<uint32_t, AbstractController *> > g_abs_controls;
diff -r ff4b1bde5f60 -r 28d88a0fda74 src/mem/ruby/common/Global.hh
--- a/src/mem/ruby/common/Global.hh Sun Feb 10 13:23:56 2013 +0100
+++ b/src/mem/ruby/common/Global.hh Sun Feb 10 21:26:22 2013 -0600
@@ -29,10 +29,16 @@
#ifndef __MEM_RUBY_COMMON_GLOBAL_HH__
#define __MEM_RUBY_COMMON_GLOBAL_HH__
+#include <map>
+#include <vector>
+
#include "base/str.hh"
class RubySystem;
extern RubySystem* g_system_ptr;
+class AbstractController;
+extern std::vector<std::map<uint32_t, AbstractController *> > g_abs_controls;
+
#endif // __MEM_RUBY_COMMON_GLOBAL_HH__
diff -r ff4b1bde5f60 -r 28d88a0fda74 src/mem/ruby/network/Topology.cc
--- a/src/mem/ruby/network/Topology.cc Sun Feb 10 13:23:56 2013 +0100
+++ b/src/mem/ruby/network/Topology.cc Sun Feb 10 21:26:22 2013 -0600
@@ -89,8 +89,7 @@
AbstractController *abs_cntrl = ext_link->params()->ext_node;
BasicRouter *router = ext_link->params()->int_node;
- // Store the controller and ExtLink pointers for later
- m_controller_vector.push_back(abs_cntrl);
+ // Store the ExtLink pointers for later
m_ext_link_vector.push_back(ext_link);
int ext_idx1 = abs_cntrl->params()->cntrl_id;
@@ -265,22 +264,6 @@
}
}
-void
-Topology::printStats(std::ostream& out) const
-{
- for (int cntrl = 0; cntrl < m_controller_vector.size(); cntrl++) {
- m_controller_vector[cntrl]->printStats(out);
- }
-}
-
-void
-Topology::clearStats()
-{
- for (int cntrl = 0; cntrl < m_controller_vector.size(); cntrl++) {
- m_controller_vector[cntrl]->clearStats();
- }
-}
-
// The following all-pairs shortest path algorithm is based on the
// discussion from Cormen et al., Chapter 26.1.
void
diff -r ff4b1bde5f60 -r 28d88a0fda74 src/mem/ruby/network/Topology.hh
--- a/src/mem/ruby/network/Topology.hh Sun Feb 10 13:23:56 2013 +0100
+++ b/src/mem/ruby/network/Topology.hh Sun Feb 10 21:26:22 2013 -0600
@@ -78,8 +78,6 @@
void initNetworkPtr(Network* net_ptr);
const std::string getName() { return m_name; }
- void printStats(std::ostream& out) const;
- void clearStats();
void print(std::ostream& out) const { out << "[Topology]"; }
protected:
@@ -99,7 +97,6 @@
NodeID m_nodes;
int m_number_of_switches;
- std::vector<AbstractController*> m_controller_vector;
std::vector<BasicExtLink*> m_ext_link_vector;
std::vector<BasicIntLink*> m_int_link_vector;
diff -r ff4b1bde5f60 -r 28d88a0fda74
src/mem/ruby/network/garnet/BaseGarnetNetwork.cc
--- a/src/mem/ruby/network/garnet/BaseGarnetNetwork.cc Sun Feb 10 13:23:56
2013 +0100
+++ b/src/mem/ruby/network/garnet/BaseGarnetNetwork.cc Sun Feb 10 21:26:22
2013 -0600
@@ -146,7 +146,6 @@
printPerformanceStats(out);
printLinkStats(out);
printPowerStats(out);
- m_topology_ptr->printStats(out);
}
void
diff -r ff4b1bde5f60 -r 28d88a0fda74
src/mem/ruby/network/simple/SimpleNetwork.cc
--- a/src/mem/ruby/network/simple/SimpleNetwork.cc Sun Feb 10 13:23:56
2013 +0100
+++ b/src/mem/ruby/network/simple/SimpleNetwork.cc Sun Feb 10 21:26:22
2013 -0600
@@ -304,7 +304,6 @@
for (int i = 0; i < m_switch_ptr_vector.size(); i++) {
m_switch_ptr_vector[i]->printStats(out);
}
- m_topology_ptr->printStats(out);
}
void
@@ -313,7 +312,6 @@
for (int i = 0; i < m_switch_ptr_vector.size(); i++) {
m_switch_ptr_vector[i]->clearStats();
}
- m_topology_ptr->clearStats();
}
void
diff -r ff4b1bde5f60 -r 28d88a0fda74 src/mem/ruby/profiler/Profiler.cc
--- a/src/mem/ruby/profiler/Profiler.cc Sun Feb 10 13:23:56 2013 +0100
+++ b/src/mem/ruby/profiler/Profiler.cc Sun Feb 10 21:26:22 2013 -0600
@@ -171,6 +171,59 @@
}
void
+Profiler::printRequestProfile(ostream &out)
+{
+ out << "Request vs. RubySystem State Profile" << endl;
+ out << "--------------------------------" << endl;
+ out << endl;
+
+ map<string, uint64_t> m_requestProfileMap;
+ uint64_t m_requests = 0;
+
+ for (uint32_t i = 0; i < MachineType_NUM; i++) {
+ for (map<uint32_t, AbstractController*>::iterator it =
+ g_abs_controls[i].begin();
+ it != g_abs_controls[i].end(); ++it) {
+
+ AbstractController *ctr = (*it).second;
+ map<string, uint64_t> mp = ctr->getRequestProfileMap();
+
+ for (map<string, uint64_t>::iterator jt = mp.begin();
+ jt != mp.end(); ++jt) {
+
+ map<string, uint64_t>::iterator kt =
+ m_requestProfileMap.find((*jt).first);
+ if (kt != m_requestProfileMap.end()) {
+ (*kt).second += (*jt).second;
+ } else {
+ m_requestProfileMap[(*jt).first] = (*jt).second;
+ }
+ }
+
+ m_requests += ctr->getRequestCount();
+ }
+ }
+
+ map<string, uint64_t>::const_iterator i = m_requestProfileMap.begin();
+ map<string, uint64_t>::const_iterator end = m_requestProfileMap.end();
+ for (; i != end; ++i) {
+ const string &key = i->first;
+ uint64_t count = i->second;
+
+ double percent = (100.0 * double(count)) / double(m_requests);
+ vector<string> items;
+ tokenize(items, key, ':');
+ vector<string>::iterator j = items.begin();
+ vector<string>::iterator end = items.end();
+ for (; j != end; ++i)
+ out << setw(10) << *j;
+ out << setw(11) << count;
+ out << setw(14) << percent << endl;
+ }
+ out << endl;
+}
+
+void
Profiler::printStats(ostream& out, bool short_stats)
{
out << endl;
@@ -237,13 +290,17 @@
if (!short_stats) {
out << "Busy Controller Counts:" << endl;
- for (int i = 0; i < MachineType_NUM; i++) {
- int size = MachineType_base_count((MachineType)i);
- for (int j = 0; j < size; j++) {
+ for (uint32_t i = 0; i < MachineType_NUM; i++) {
+ uint32_t size = MachineType_base_count((MachineType)i);
+
+ for (uint32_t j = 0; j < size; j++) {
MachineID machID;
machID.type = (MachineType)i;
machID.num = j;
- out << machID << ":" << m_busyControllerCount[i][j] << " ";
+
+ AbstractController *ctr =
+ (*(g_abs_controls[i].find(j))).second;
+ out << machID << ":" << ctr->getFullyBusyCycles() << " ";
if ((j + 1) % 8 == 0) {
out << endl;
}
@@ -365,27 +422,7 @@
}
if (!short_stats) {
- out << "Request vs. RubySystem State Profile" << endl;
- out << "--------------------------------" << endl;
- out << endl;
-
- map<string, int>::const_iterator i = m_requestProfileMap.begin();
- map<string, int>::const_iterator end = m_requestProfileMap.end();
- for (; i != end; ++i) {
- const string &key = i->first;
- int count = i->second;
-
- double percent = (100.0 * double(count)) / double(m_requests);
- vector<string> items;
- tokenize(items, key, ':');
- vector<string>::iterator j = items.begin();
- vector<string>::iterator end = items.end();
- for (; j != end; ++i)
- out << setw(10) << *j;
- out << setw(11) << count;
- out << setw(14) << percent << endl;
- }
- out << endl;
+ printRequestProfile(out);
out << "filter_action: " << m_filter_action_histogram << endl;
@@ -449,14 +486,6 @@
}
}
- m_busyControllerCount.resize(MachineType_NUM); // all machines
- for (int i = 0; i < MachineType_NUM; i++) {
- int size = MachineType_base_count((MachineType)i);
- m_busyControllerCount[i].resize(size);
- for (int j = 0; j < size; j++) {
- m_busyControllerCount[i][j] = 0;
- }
- }
m_busyBankCount = 0;
m_delayedCyclesHistogram.clear();
@@ -511,12 +540,6 @@
m_cache_to_cache = 0;
m_memory_to_cache = 0;
- // clear HashMaps
- m_requestProfileMap.clear();
-
- // count requests profiled
- m_requests = 0;
-
m_outstanding_requests.clear();
m_outstanding_persistent_requests.clear();
@@ -581,23 +604,6 @@
}
}
-// profiles original cache requests including PUTs
-void
-Profiler::profileRequest(const string& requestStr)
-{
- m_requests++;
-
- // if it doesn't exist, conveniently, it will be created with the
- // default value which is 0
- m_requestProfileMap[requestStr]++;
-}
-
-void
-Profiler::controllerBusy(MachineID machID)
-{
- m_busyControllerCount[(int)machID.type][(int)machID.num]++;
-}
-
void
Profiler::profilePFWait(Time waitTime)
{
diff -r ff4b1bde5f60 -r 28d88a0fda74 src/mem/ruby/profiler/Profiler.hh
--- a/src/mem/ruby/profiler/Profiler.hh Sun Feb 10 13:23:56 2013 +0100
+++ b/src/mem/ruby/profiler/Profiler.hh Sun Feb 10 21:26:22 2013 -0600
@@ -171,6 +171,9 @@
bool getAllInstructions() { return m_all_instructions; }
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