changeset c1a5a20cc1fa in /z/repo/gem5 details: http://repo.gem5.org/gem5?cmd=changeset;node=c1a5a20cc1fa description: regressions: x86: stats updates due to new x87 insts
diffstat: tests/long/se/00.gzip/ref/x86/linux/o3-timing/config.ini | 21 +- tests/long/se/00.gzip/ref/x86/linux/o3-timing/simerr | 1 - tests/long/se/00.gzip/ref/x86/linux/o3-timing/simout | 6 +- tests/long/se/00.gzip/ref/x86/linux/o3-timing/stats.txt | 1005 +++--- tests/long/se/00.gzip/ref/x86/linux/simple-atomic/config.ini | 3 +- tests/long/se/00.gzip/ref/x86/linux/simple-atomic/simerr | 1 - tests/long/se/00.gzip/ref/x86/linux/simple-atomic/simout | 6 +- tests/long/se/00.gzip/ref/x86/linux/simple-atomic/stats.txt | 62 +- tests/long/se/00.gzip/ref/x86/linux/simple-timing/config.ini | 4 +- tests/long/se/00.gzip/ref/x86/linux/simple-timing/simerr | 1 - tests/long/se/00.gzip/ref/x86/linux/simple-timing/simout | 6 +- tests/long/se/00.gzip/ref/x86/linux/simple-timing/stats.txt | 76 +- tests/long/se/10.mcf/ref/x86/linux/o3-timing/config.ini | 21 +- tests/long/se/10.mcf/ref/x86/linux/o3-timing/simerr | 1 - tests/long/se/10.mcf/ref/x86/linux/o3-timing/simout | 6 +- tests/long/se/10.mcf/ref/x86/linux/o3-timing/stats.txt | 1157 ++++---- tests/long/se/10.mcf/ref/x86/linux/simple-atomic/config.ini | 3 +- tests/long/se/10.mcf/ref/x86/linux/simple-atomic/simerr | 1 - tests/long/se/10.mcf/ref/x86/linux/simple-atomic/simout | 6 +- tests/long/se/10.mcf/ref/x86/linux/simple-atomic/stats.txt | 62 +- tests/long/se/10.mcf/ref/x86/linux/simple-timing/config.ini | 4 +- tests/long/se/10.mcf/ref/x86/linux/simple-timing/simerr | 1 - tests/long/se/10.mcf/ref/x86/linux/simple-timing/simout | 6 +- tests/long/se/10.mcf/ref/x86/linux/simple-timing/stats.txt | 78 +- tests/long/se/20.parser/ref/x86/linux/o3-timing/config.ini | 21 +- tests/long/se/20.parser/ref/x86/linux/o3-timing/simerr | 1 - tests/long/se/20.parser/ref/x86/linux/o3-timing/simout | 8 +- tests/long/se/20.parser/ref/x86/linux/o3-timing/stats.txt | 1309 +++++---- tests/long/se/20.parser/ref/x86/linux/simple-atomic/config.ini | 3 +- tests/long/se/20.parser/ref/x86/linux/simple-atomic/simerr | 1 - tests/long/se/20.parser/ref/x86/linux/simple-atomic/simout | 6 +- tests/long/se/20.parser/ref/x86/linux/simple-atomic/stats.txt | 60 +- tests/long/se/20.parser/ref/x86/linux/simple-timing/config.ini | 4 +- tests/long/se/20.parser/ref/x86/linux/simple-timing/simerr | 1 - tests/long/se/20.parser/ref/x86/linux/simple-timing/simout | 6 +- tests/long/se/20.parser/ref/x86/linux/simple-timing/stats.txt | 76 +- tests/long/se/60.bzip2/ref/x86/linux/simple-atomic/config.ini | 3 +- tests/long/se/60.bzip2/ref/x86/linux/simple-atomic/simerr | 1 - tests/long/se/60.bzip2/ref/x86/linux/simple-atomic/simout | 6 +- tests/long/se/60.bzip2/ref/x86/linux/simple-atomic/stats.txt | 54 +- tests/long/se/60.bzip2/ref/x86/linux/simple-timing/config.ini | 4 +- tests/long/se/60.bzip2/ref/x86/linux/simple-timing/simerr | 1 - tests/long/se/60.bzip2/ref/x86/linux/simple-timing/simout | 6 +- tests/long/se/60.bzip2/ref/x86/linux/simple-timing/stats.txt | 74 +- tests/long/se/70.twolf/ref/x86/linux/o3-timing/config.ini | 21 +- tests/long/se/70.twolf/ref/x86/linux/o3-timing/simerr | 1 - tests/long/se/70.twolf/ref/x86/linux/o3-timing/simout | 6 +- tests/long/se/70.twolf/ref/x86/linux/o3-timing/stats.txt | 1148 ++++---- tests/long/se/70.twolf/ref/x86/linux/simple-atomic/config.ini | 3 +- tests/long/se/70.twolf/ref/x86/linux/simple-atomic/simerr | 1 - tests/long/se/70.twolf/ref/x86/linux/simple-atomic/simout | 6 +- tests/long/se/70.twolf/ref/x86/linux/simple-atomic/stats.txt | 62 +- tests/long/se/70.twolf/ref/x86/linux/simple-timing/config.ini | 4 +- tests/long/se/70.twolf/ref/x86/linux/simple-timing/simerr | 1 - tests/long/se/70.twolf/ref/x86/linux/simple-timing/simout | 6 +- tests/long/se/70.twolf/ref/x86/linux/simple-timing/stats.txt | 76 +- tests/quick/se/00.hello/ref/x86/linux/o3-timing/simerr | 1 - tests/quick/se/00.hello/ref/x86/linux/o3-timing/simout | 6 +- tests/quick/se/00.hello/ref/x86/linux/o3-timing/stats.txt | 589 ++-- tests/quick/se/00.hello/ref/x86/linux/simple-atomic/config.ini | 3 +- tests/quick/se/00.hello/ref/x86/linux/simple-atomic/simerr | 1 - tests/quick/se/00.hello/ref/x86/linux/simple-atomic/simout | 6 +- tests/quick/se/00.hello/ref/x86/linux/simple-atomic/stats.txt | 62 +- tests/quick/se/00.hello/ref/x86/linux/simple-timing-ruby/ruby.stats | 67 +- tests/quick/se/00.hello/ref/x86/linux/simple-timing-ruby/simerr | 5 +- tests/quick/se/00.hello/ref/x86/linux/simple-timing-ruby/simout | 4 +- tests/quick/se/00.hello/ref/x86/linux/simple-timing-ruby/stats.txt | 26 +- tests/quick/se/00.hello/ref/x86/linux/simple-timing/config.ini | 4 +- tests/quick/se/00.hello/ref/x86/linux/simple-timing/simerr | 1 - tests/quick/se/00.hello/ref/x86/linux/simple-timing/simout | 6 +- tests/quick/se/00.hello/ref/x86/linux/simple-timing/stats.txt | 122 +- 71 files changed, 3223 insertions(+), 3198 deletions(-) diffs (truncated from 8726 to 300 lines): diff -r 0632d2d1575c -r c1a5a20cc1fa tests/long/se/00.gzip/ref/x86/linux/o3-timing/config.ini --- a/tests/long/se/00.gzip/ref/x86/linux/o3-timing/config.ini Mon Mar 11 13:15:46 2013 -0500 +++ b/tests/long/se/00.gzip/ref/x86/linux/o3-timing/config.ini Mon Mar 11 17:45:09 2013 -0500 @@ -452,7 +452,7 @@ [system.cpu.interrupts] type=X86LocalApic -clock=500 +clock=8000 int_latency=1000 pio_addr=2305843009213693952 pio_latency=100000 @@ -503,6 +503,7 @@ block_size=64 clock=500 header_cycles=1 +system=system use_default_range=false width=32 master=system.cpu.l2cache.cpu_side @@ -535,6 +536,7 @@ block_size=64 clock=1000 header_cycles=1 +system=system use_default_range=false width=8 master=system.physmem.port system.cpu.interrupts.pio system.cpu.interrupts.int_slave @@ -542,25 +544,28 @@ [system.physmem] type=SimpleDRAM +activation_limit=4 addr_mapping=openmap banks_per_rank=8 +channels=1 clock=1000 conf_table_reported=false in_addr_map=true -lines_per_rowbuffer=64 -mem_sched_policy=fcfs +lines_per_rowbuffer=32 +mem_sched_policy=frfcfs null=false page_policy=open range=0:134217727 ranks_per_channel=2 read_buffer_size=32 -tBURST=4000 -tCL=14000 -tRCD=14000 +tBURST=5000 +tCL=13750 +tRCD=13750 tREFI=7800000 tRFC=300000 -tRP=14000 -tWTR=1000 +tRP=13750 +tWTR=7500 +tXAW=40000 write_buffer_size=32 write_thresh_perc=70 zero=false diff -r 0632d2d1575c -r c1a5a20cc1fa tests/long/se/00.gzip/ref/x86/linux/o3-timing/simerr --- a/tests/long/se/00.gzip/ref/x86/linux/o3-timing/simerr Mon Mar 11 13:15:46 2013 -0500 +++ b/tests/long/se/00.gzip/ref/x86/linux/o3-timing/simerr Mon Mar 11 17:45:09 2013 -0500 @@ -1,3 +1,2 @@ warn: Sockets disabled, not accepting gdb connections -warn: instruction 'fldcw_Mw' unimplemented hack: be nice to actually delete the event here diff -r 0632d2d1575c -r c1a5a20cc1fa tests/long/se/00.gzip/ref/x86/linux/o3-timing/simout --- a/tests/long/se/00.gzip/ref/x86/linux/o3-timing/simout Mon Mar 11 13:15:46 2013 -0500 +++ b/tests/long/se/00.gzip/ref/x86/linux/o3-timing/simout Mon Mar 11 17:45:09 2013 -0500 @@ -3,8 +3,8 @@ gem5 Simulator System. http://gem5.org gem5 is copyrighted software; use the --copyright option for details. -gem5 compiled Jan 23 2013 16:30:44 -gem5 started Jan 23 2013 18:48:34 +gem5 compiled Mar 11 2013 13:21:48 +gem5 started Mar 11 2013 13:30:24 gem5 executing on ribera.cs.wisc.edu command line: build/X86/gem5.opt -d build/X86/tests/opt/long/se/00.gzip/x86/linux/o3-timing -re tests/run.py build/X86/tests/opt/long/se/00.gzip/x86/linux/o3-timing Global frequency set at 1000000000000 ticks per second @@ -42,4 +42,4 @@ Uncompressed data 1048576 bytes in length Uncompressed data compared correctly Tested 1MB buffer: OK! -Exiting @ tick 607445544000 because target called exit() +Exiting @ tick 607412415000 because target called exit() diff -r 0632d2d1575c -r c1a5a20cc1fa tests/long/se/00.gzip/ref/x86/linux/o3-timing/stats.txt --- a/tests/long/se/00.gzip/ref/x86/linux/o3-timing/stats.txt Mon Mar 11 13:15:46 2013 -0500 +++ b/tests/long/se/00.gzip/ref/x86/linux/o3-timing/stats.txt Mon Mar 11 17:45:09 2013 -0500 @@ -1,61 +1,61 @@ ---------- Begin Simulation Statistics ---------- -sim_seconds 0.607292 # Number of seconds simulated -sim_ticks 607292111000 # Number of ticks simulated -final_tick 607292111000 # Number of ticks from beginning of simulation (restored from checkpoints and never reset) +sim_seconds 0.607412 # Number of seconds simulated +sim_ticks 607412415000 # Number of ticks simulated +final_tick 607412415000 # Number of ticks from beginning of simulation (restored from checkpoints and never reset) sim_freq 1000000000000 # Frequency of simulated ticks -host_inst_rate 88731 # Simulator instruction rate (inst/s) -host_op_rate 163492 # Simulator op (including micro ops) rate (op/s) -host_tick_rate 61232046 # Simulator tick rate (ticks/s) -host_mem_usage 248756 # Number of bytes of host memory used -host_seconds 9917.88 # Real time elapsed on the host +host_inst_rate 59004 # Simulator instruction rate (inst/s) +host_op_rate 108719 # Simulator op (including micro ops) rate (op/s) +host_tick_rate 40726098 # Simulator tick rate (ticks/s) +host_mem_usage 295644 # Number of bytes of host memory used +host_seconds 14914.57 # Real time elapsed on the host sim_insts 880025277 # Number of instructions simulated -sim_ops 1621493926 # Number of ops (including micro ops) simulated +sim_ops 1621493927 # Number of ops (including micro ops) simulated system.physmem.bytes_read::cpu.inst 57664 # Number of bytes read from this memory -system.physmem.bytes_read::cpu.data 1693184 # Number of bytes read from this memory -system.physmem.bytes_read::total 1750848 # Number of bytes read from this memory +system.physmem.bytes_read::cpu.data 1693248 # Number of bytes read from this memory +system.physmem.bytes_read::total 1750912 # Number of bytes read from this memory system.physmem.bytes_inst_read::cpu.inst 57664 # Number of instructions bytes read from this memory system.physmem.bytes_inst_read::total 57664 # Number of instructions bytes read from this memory system.physmem.bytes_written::writebacks 162176 # Number of bytes written to this memory system.physmem.bytes_written::total 162176 # Number of bytes written to this memory system.physmem.num_reads::cpu.inst 901 # Number of read requests responded to by this memory -system.physmem.num_reads::cpu.data 26456 # Number of read requests responded to by this memory -system.physmem.num_reads::total 27357 # Number of read requests responded to by this memory +system.physmem.num_reads::cpu.data 26457 # Number of read requests responded to by this memory +system.physmem.num_reads::total 27358 # Number of read requests responded to by this memory system.physmem.num_writes::writebacks 2534 # Number of write requests responded to by this memory system.physmem.num_writes::total 2534 # Number of write requests responded to by this memory -system.physmem.bw_read::cpu.inst 94953 # Total read bandwidth from this memory (bytes/s) -system.physmem.bw_read::cpu.data 2788088 # Total read bandwidth from this memory (bytes/s) -system.physmem.bw_read::total 2883041 # Total read bandwidth from this memory (bytes/s) -system.physmem.bw_inst_read::cpu.inst 94953 # Instruction read bandwidth from this memory (bytes/s) -system.physmem.bw_inst_read::total 94953 # Instruction read bandwidth from this memory (bytes/s) -system.physmem.bw_write::writebacks 267048 # Write bandwidth from this memory (bytes/s) -system.physmem.bw_write::total 267048 # Write bandwidth from this memory (bytes/s) -system.physmem.bw_total::writebacks 267048 # Total bandwidth to/from this memory (bytes/s) -system.physmem.bw_total::cpu.inst 94953 # Total bandwidth to/from this memory (bytes/s) -system.physmem.bw_total::cpu.data 2788088 # Total bandwidth to/from this memory (bytes/s) -system.physmem.bw_total::total 3150089 # Total bandwidth to/from this memory (bytes/s) -system.physmem.readReqs 27359 # Total number of read requests seen +system.physmem.bw_read::cpu.inst 94934 # Total read bandwidth from this memory (bytes/s) +system.physmem.bw_read::cpu.data 2787641 # Total read bandwidth from this memory (bytes/s) +system.physmem.bw_read::total 2882575 # Total read bandwidth from this memory (bytes/s) +system.physmem.bw_inst_read::cpu.inst 94934 # Instruction read bandwidth from this memory (bytes/s) +system.physmem.bw_inst_read::total 94934 # Instruction read bandwidth from this memory (bytes/s) +system.physmem.bw_write::writebacks 266995 # Write bandwidth from this memory (bytes/s) +system.physmem.bw_write::total 266995 # Write bandwidth from this memory (bytes/s) +system.physmem.bw_total::writebacks 266995 # Total bandwidth to/from this memory (bytes/s) +system.physmem.bw_total::cpu.inst 94934 # Total bandwidth to/from this memory (bytes/s) +system.physmem.bw_total::cpu.data 2787641 # Total bandwidth to/from this memory (bytes/s) +system.physmem.bw_total::total 3149570 # Total bandwidth to/from this memory (bytes/s) +system.physmem.readReqs 27360 # Total number of read requests seen system.physmem.writeReqs 2534 # Total number of write requests seen -system.physmem.cpureqs 29893 # Reqs generatd by CPU via cache - shady -system.physmem.bytesRead 1750848 # Total number of bytes read from memory +system.physmem.cpureqs 29894 # Reqs generatd by CPU via cache - shady +system.physmem.bytesRead 1750912 # Total number of bytes read from memory system.physmem.bytesWritten 162176 # Total number of bytes written to memory -system.physmem.bytesConsumedRd 1750848 # bytesRead derated as per pkt->getSize() +system.physmem.bytesConsumedRd 1750912 # bytesRead derated as per pkt->getSize() system.physmem.bytesConsumedWr 162176 # bytesWritten derated as per pkt->getSize() system.physmem.servicedByWrQ 0 # Number of read reqs serviced by write Q system.physmem.neitherReadNorWrite 0 # Reqs where no action is needed -system.physmem.perBankRdReqs::0 1742 # Track reads on a per bank basis +system.physmem.perBankRdReqs::0 1741 # Track reads on a per bank basis system.physmem.perBankRdReqs::1 1719 # Track reads on a per bank basis -system.physmem.perBankRdReqs::2 1712 # Track reads on a per bank basis +system.physmem.perBankRdReqs::2 1711 # Track reads on a per bank basis system.physmem.perBankRdReqs::3 1642 # Track reads on a per bank basis -system.physmem.perBankRdReqs::4 1655 # Track reads on a per bank basis +system.physmem.perBankRdReqs::4 1657 # Track reads on a per bank basis system.physmem.perBankRdReqs::5 1654 # Track reads on a per bank basis -system.physmem.perBankRdReqs::6 1714 # Track reads on a per bank basis +system.physmem.perBankRdReqs::6 1713 # Track reads on a per bank basis system.physmem.perBankRdReqs::7 1701 # Track reads on a per bank basis system.physmem.perBankRdReqs::8 1712 # Track reads on a per bank basis -system.physmem.perBankRdReqs::9 1708 # Track reads on a per bank basis +system.physmem.perBankRdReqs::9 1711 # Track reads on a per bank basis system.physmem.perBankRdReqs::10 1718 # Track reads on a per bank basis system.physmem.perBankRdReqs::11 1730 # Track reads on a per bank basis -system.physmem.perBankRdReqs::12 1739 # Track reads on a per bank basis +system.physmem.perBankRdReqs::12 1738 # Track reads on a per bank basis system.physmem.perBankRdReqs::13 1728 # Track reads on a per bank basis system.physmem.perBankRdReqs::14 1750 # Track reads on a per bank basis system.physmem.perBankRdReqs::15 1735 # Track reads on a per bank basis @@ -77,14 +77,14 @@ system.physmem.perBankWrReqs::15 159 # Track writes on a per bank basis system.physmem.numRdRetry 0 # Number of times rd buffer was full causing retry system.physmem.numWrRetry 0 # Number of times wr buffer was full causing retry -system.physmem.totGap 607292095000 # Total gap between requests +system.physmem.totGap 607412402000 # Total gap between requests system.physmem.readPktSize::0 0 # Categorize read packet sizes system.physmem.readPktSize::1 0 # Categorize read packet sizes system.physmem.readPktSize::2 0 # Categorize read packet sizes system.physmem.readPktSize::3 0 # Categorize read packet sizes system.physmem.readPktSize::4 0 # Categorize read packet sizes system.physmem.readPktSize::5 0 # Categorize read packet sizes -system.physmem.readPktSize::6 27359 # Categorize read packet sizes +system.physmem.readPktSize::6 27360 # Categorize read packet sizes system.physmem.writePktSize::0 0 # Categorize write packet sizes system.physmem.writePktSize::1 0 # Categorize write packet sizes system.physmem.writePktSize::2 0 # Categorize write packet sizes @@ -92,9 +92,9 @@ system.physmem.writePktSize::4 0 # Categorize write packet sizes system.physmem.writePktSize::5 0 # Categorize write packet sizes system.physmem.writePktSize::6 2534 # Categorize write packet sizes -system.physmem.rdQLenPdf::0 26892 # What read queue length does an incoming req see -system.physmem.rdQLenPdf::1 344 # What read queue length does an incoming req see -system.physmem.rdQLenPdf::2 100 # What read queue length does an incoming req see +system.physmem.rdQLenPdf::0 26889 # What read queue length does an incoming req see +system.physmem.rdQLenPdf::1 351 # What read queue length does an incoming req see +system.physmem.rdQLenPdf::2 97 # What read queue length does an incoming req see system.physmem.rdQLenPdf::3 21 # What read queue length does an incoming req see system.physmem.rdQLenPdf::4 2 # What read queue length does an incoming req see system.physmem.rdQLenPdf::5 0 # What read queue length does an incoming req see @@ -156,14 +156,14 @@ system.physmem.wrQLenPdf::29 0 # What write queue length does an incoming req see system.physmem.wrQLenPdf::30 0 # What write queue length does an incoming req see system.physmem.wrQLenPdf::31 0 # What write queue length does an incoming req see -system.physmem.totQLat 90421500 # Total cycles spent in queuing delays -system.physmem.totMemAccLat 895535250 # Sum of mem lat for all requests -system.physmem.totBusLat 136795000 # Total cycles spent in databus access -system.physmem.totBankLat 668318750 # Total cycles spent in bank access -system.physmem.avgQLat 3305.00 # Average queueing delay per request -system.physmem.avgBankLat 24427.75 # Average bank access latency per request +system.physmem.totQLat 88987000 # Total cycles spent in queuing delays +system.physmem.totMemAccLat 893982000 # Sum of mem lat for all requests +system.physmem.totBusLat 136800000 # Total cycles spent in databus access +system.physmem.totBankLat 668195000 # Total cycles spent in bank access +system.physmem.avgQLat 3252.45 # Average queueing delay per request +system.physmem.avgBankLat 24422.33 # Average bank access latency per request system.physmem.avgBusLat 5000.00 # Average bus latency per request -system.physmem.avgMemAccLat 32732.75 # Average memory access latency +system.physmem.avgMemAccLat 32674.78 # Average memory access latency system.physmem.avgRdBW 2.88 # Average achieved read bandwidth in MB/s system.physmem.avgWrBW 0.27 # Average achieved write bandwidth in MB/s system.physmem.avgConsumedRdBW 2.88 # Average consumed read bandwidth in MB/s @@ -171,144 +171,144 @@ system.physmem.peakBW 12800.00 # Theoretical peak bandwidth in MB/s system.physmem.busUtil 0.02 # Data bus utilization in percentage system.physmem.avgRdQLen 0.00 # Average read queue length over time -system.physmem.avgWrQLen 6.24 # Average write queue length over time -system.physmem.readRowHits 16426 # Number of row buffer hits during reads -system.physmem.writeRowHits 1032 # Number of row buffer hits during writes +system.physmem.avgWrQLen 13.09 # Average write queue length over time +system.physmem.readRowHits 16427 # Number of row buffer hits during reads +system.physmem.writeRowHits 1022 # Number of row buffer hits during writes system.physmem.readRowHitRate 60.04 # Row buffer hit rate for reads -system.physmem.writeRowHitRate 40.73 # Row buffer hit rate for writes -system.physmem.avgGap 20315528.55 # Average gap between requests -system.cpu.branchPred.lookups 158482804 # Number of BP lookups -system.cpu.branchPred.condPredicted 158482804 # Number of conditional branches predicted -system.cpu.branchPred.condIncorrect 26384558 # Number of conditional branches incorrect -system.cpu.branchPred.BTBLookups 84639114 # Number of BTB lookups -system.cpu.branchPred.BTBHits 84422216 # Number of BTB hits +system.physmem.writeRowHitRate 40.33 # Row buffer hit rate for writes +system.physmem.avgGap 20318873.42 # Average gap between requests +system.cpu.branchPred.lookups 158382296 # Number of BP lookups +system.cpu.branchPred.condPredicted 158382296 # Number of conditional branches predicted +system.cpu.branchPred.condIncorrect 26387252 # Number of conditional branches incorrect +system.cpu.branchPred.BTBLookups 83381183 # Number of BTB lookups +system.cpu.branchPred.BTBHits 83179505 # Number of BTB hits system.cpu.branchPred.BTBCorrect 0 # Number of correct BTB predictions (this stat may not work properly. -system.cpu.branchPred.BTBHitPct 99.743738 # BTB Hit Percentage +system.cpu.branchPred.BTBHitPct 99.758125 # BTB Hit Percentage system.cpu.branchPred.usedRAS 0 # Number of times the RAS was used to get a target. system.cpu.branchPred.RASInCorrect 0 # Number of incorrect RAS predictions. system.cpu.workload.num_syscalls 48 # Number of system calls -system.cpu.numCycles 1214584223 # number of cpu cycles simulated +system.cpu.numCycles 1214824831 # number of cpu cycles simulated system.cpu.numWorkItemsStarted 0 # number of work items this cpu started system.cpu.numWorkItemsCompleted 0 # number of work items this cpu completed -system.cpu.fetch.icacheStallCycles 179034165 # Number of cycles fetch is stalled on an Icache miss -system.cpu.fetch.Insts 1457747721 # Number of instructions fetch has processed -system.cpu.fetch.Branches 158482804 # Number of branches that fetch encountered -system.cpu.fetch.predictedBranches 84422216 # Number of branches that fetch has predicted taken -system.cpu.fetch.Cycles 399024262 # Number of cycles fetch has run and was not squashing or blocked -system.cpu.fetch.SquashCycles 88084887 # Number of cycles fetch has spent squashing -system.cpu.fetch.BlockedCycles 574618713 # Number of cycles fetch has spent blocked -system.cpu.fetch.MiscStallCycles 47 # Number of cycles fetch has spent waiting on interrupts, or bad addresses, or out of MSHRs -system.cpu.fetch.PendingTrapStallCycles 378 # Number of stall cycles due to pending traps -system.cpu.fetch.CacheLines 188004827 # Number of cache lines fetched -system.cpu.fetch.IcacheSquashes 11985682 # Number of outstanding Icache misses that were squashed -system.cpu.fetch.rateDist::samples 1214221440 # Number of instructions fetched each cycle (Total) -system.cpu.fetch.rateDist::mean 2.059311 # Number of instructions fetched each cycle (Total) -system.cpu.fetch.rateDist::stdev 3.252911 # Number of instructions fetched each cycle (Total) +system.cpu.fetch.icacheStallCycles 179163349 # Number of cycles fetch is stalled on an Icache miss +system.cpu.fetch.Insts 1457867613 # Number of instructions fetch has processed +system.cpu.fetch.Branches 158382296 # Number of branches that fetch encountered +system.cpu.fetch.predictedBranches 83179505 # Number of branches that fetch has predicted taken +system.cpu.fetch.Cycles 399005833 # Number of cycles fetch has run and was not squashing or blocked +system.cpu.fetch.SquashCycles 88132062 # Number of cycles fetch has spent squashing +system.cpu.fetch.BlockedCycles 574704368 # Number of cycles fetch has spent blocked +system.cpu.fetch.MiscStallCycles 43 # Number of cycles fetch has spent waiting on interrupts, or bad addresses, or out of MSHRs +system.cpu.fetch.PendingTrapStallCycles 361 # Number of stall cycles due to pending traps _______________________________________________ gem5-dev mailing list [email protected] http://m5sim.org/mailman/listinfo/gem5-dev
