> On April 2, 2013, 12:36 p.m., Meng Wang wrote: > > src/cpu/simple/atomic.cc, line 623 > > <http://reviews.gem5.org/r/1705/diff/1/?file=33975#file33975line623> > > > > Should here be: > > "info.count++;" ? > > Or info.count will become the BBV number timed by instruction number of > > this basic block. > > Mitch Hayenga wrote: > This was intentional. I can't find where in the Simpoint papers/tech > reports where it says this right now, but it's also the way Valgrind does > simpoint analysis. > > http://valgrind.org/docs/manual/bbv-manual.html#bbv-manual.fileformat > "The frequency count is multiplied by the number of instructions that are > in the basic block, in order to weigh the count so that instructions in small > basic blocks aren't counted as more important than instructions in large > basic blocks."
Thanks. This explain makes sense. I understand now. - Meng ----------------------------------------------------------- This is an automatically generated e-mail. To reply, visit: http://reviews.gem5.org/r/1705/#review4182 ----------------------------------------------------------- On Feb. 13, 2013, 8:58 a.m., Ali Saidi wrote: > > ----------------------------------------------------------- > This is an automatically generated e-mail. To reply, visit: > http://reviews.gem5.org/r/1705/ > ----------------------------------------------------------- > > (Updated Feb. 13, 2013, 8:58 a.m.) > > > Review request for Default. > > > Description > ------- > > Changeset 9536:af826b390123 > --------------------------- > cpu: generate SimPoint basic block vector profiles > > This patch is based on http://reviews.m5sim.org/r/1474/ originally written by > Mitch Hayenga. Basic block vectors are generated (simpoint.bb.gz in simout > folder) based on start and end addresses of basic blocks. > > Some comments to the original patch are addressed and hooks are added to > create > and resume from checkpoints based on instruction counts dictated by external > SimPoint analysis tools. > > SimPoint creation/resuming options will be implemented as a separate patch. > > > Diffs > ----- > > configs/common/Options.py 921d858c5bc7 > configs/example/se.py 921d858c5bc7 > src/cpu/BaseCPU.py 921d858c5bc7 > src/cpu/base.cc 921d858c5bc7 > src/cpu/simple/AtomicSimpleCPU.py 921d858c5bc7 > src/cpu/simple/atomic.hh 921d858c5bc7 > src/cpu/simple/atomic.cc 921d858c5bc7 > > Diff: http://reviews.gem5.org/r/1705/diff/ > > > Testing > ------- > > > Thanks, > > Ali Saidi > > _______________________________________________ gem5-dev mailing list [email protected] http://m5sim.org/mailman/listinfo/gem5-dev
