changeset 7a0c51f14095 in /z/repo/gem5
details: http://repo.gem5.org/gem5?cmd=changeset;node=7a0c51f14095
description:
ARM: Add support for HDLCD controller for TC2 and newer Versatile
Express tiles.
Newer core tiles / daughterboards for the Versatile Express platform
have an
HDLCD controller that supports HD-quality output. This patch adds an
implementation of the controller.
diffstat:
src/dev/arm/RealView.py | 14 +
src/dev/arm/SConscript | 2 +
src/dev/arm/hdlcd.cc | 856 ++++++++++++++++++++++++++++++++++++++++++++++++
src/dev/arm/hdlcd.hh | 502 ++++++++++++++++++++++++++++
4 files changed, 1374 insertions(+), 0 deletions(-)
diffs (truncated from 1433 to 300 lines):
diff -r c483700ae0ce -r 7a0c51f14095 src/dev/arm/RealView.py
--- a/src/dev/arm/RealView.py Mon Apr 22 13:20:31 2013 -0400
+++ b/src/dev/arm/RealView.py Mon Apr 22 13:20:31 2013 -0400
@@ -142,6 +142,16 @@
vnc = Param.VncInput(Parent.any, "Vnc server for remote frame buffer
display")
amba_id = 0x00141111
+class HDLcd(AmbaDmaDevice):
+ type = 'HDLcd'
+ cxx_header = "dev/arm/hdlcd.hh"
+ pixel_clock = Param.Clock('65MHz', "Clock frequency of the pixel clock "
+ "(i.e. PXLREFCLK / OSCCLK 5; 23.75MHz "
+ "default up to 165MHz)")
+ vnc = Param.VncInput(Parent.any, "Vnc server for remote frame buffer "
+ "display")
+ amba_id = 0x00141000
+
class RealView(Platform):
type = 'RealView'
cxx_header = "dev/arm/realview.hh"
@@ -333,6 +343,7 @@
timer0 = Sp804(int_num0=34, int_num1=34, pio_addr=0x1C110000,
clock0='1MHz', clock1='1MHz')
timer1 = Sp804(int_num0=35, int_num1=35, pio_addr=0x1C120000,
clock0='1MHz', clock1='1MHz')
clcd = Pl111(pio_addr=0x1c1f0000, int_num=46)
+ hdlcd = HDLcd(pio_addr=0x2b000000, int_num=117)
kmi0 = Pl050(pio_addr=0x1c060000, int_num=44)
kmi1 = Pl050(pio_addr=0x1c070000, int_num=45, is_mouse=True)
cf_ctrl = IdeController(disks=[], pci_func=0, pci_dev=0, pci_bus=2,
@@ -376,9 +387,11 @@
def attachOnChipIO(self, bus, bridge):
self.gic.pio = bus.master
self.local_cpu_timer.pio = bus.master
+ self.hdlcd.dma = bus.slave
# Bridge ranges based on excluding what is part of on-chip I/O
# (gic, a9scu)
bridge.ranges = [AddrRange(0x2F000000, size='16MB'),
+ AddrRange(0x2B000000, size='4MB'),
AddrRange(0x30000000, size='256MB'),
AddrRange(0x40000000, size='512MB'),
AddrRange(0x18000000, size='64MB'),
@@ -394,6 +407,7 @@
self.timer1.pio = bus.master
self.clcd.pio = bus.master
self.clcd.dma = bus.slave
+ self.hdlcd.pio = bus.master
self.kmi0.pio = bus.master
self.kmi1.pio = bus.master
self.cf_ctrl.pio = bus.master
diff -r c483700ae0ce -r 7a0c51f14095 src/dev/arm/SConscript
--- a/src/dev/arm/SConscript Mon Apr 22 13:20:31 2013 -0400
+++ b/src/dev/arm/SConscript Mon Apr 22 13:20:31 2013 -0400
@@ -50,6 +50,7 @@
Source('gic_pl390.cc')
Source('pl011.cc')
Source('pl111.cc')
+ Source('hdlcd.cc')
Source('kmi.cc')
Source('timer_sp804.cc')
Source('rv_ctrl.cc')
@@ -58,6 +59,7 @@
Source('timer_cpulocal.cc')
DebugFlag('AMBA')
+ DebugFlag('HDLcd')
DebugFlag('PL111')
DebugFlag('Pl050')
DebugFlag('GIC')
diff -r c483700ae0ce -r 7a0c51f14095 src/dev/arm/hdlcd.cc
--- /dev/null Thu Jan 01 00:00:00 1970 +0000
+++ b/src/dev/arm/hdlcd.cc Mon Apr 22 13:20:31 2013 -0400
@@ -0,0 +1,856 @@
+/*
+ * Copyright (c) 2010-2013 ARM Limited
+ * All rights reserved
+ *
+ * The license below extends only to copyright in the software and shall
+ * not be construed as granting a license to any other intellectual
+ * property including but not limited to intellectual property relating
+ * to a hardware implementation of the functionality of the software
+ * licensed hereunder. You may use the software subject to the license
+ * terms below provided that you ensure that this notice is replicated
+ * unmodified and in its entirety in all distributions of the software,
+ * modified or unmodified, in source code or in binary form.
+ *
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions are
+ * met: redistributions of source code must retain the above copyright
+ * notice, this list of conditions and the following disclaimer;
+ * redistributions in binary form must reproduce the above copyright
+ * notice, this list of conditions and the following disclaimer in the
+ * documentation and/or other materials provided with the distribution;
+ * neither the name of the copyright holders nor the names of its
+ * contributors may be used to endorse or promote products derived from
+ * this software without specific prior written permission.
+ *
+ * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
+ * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
+ * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR
+ * A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT
+ * OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL,
+ * SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT
+ * LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
+ * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
+ * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
+ * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE
+ * OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
+ *
+ * Authors: Chris Emmons
+ */
+
+#include "base/vnc/vncinput.hh"
+#include "base/bitmap.hh"
+#include "base/output.hh"
+#include "base/trace.hh"
+#include "debug/HDLcd.hh"
+#include "debug/Uart.hh"
+#include "dev/arm/amba_device.hh"
+#include "dev/arm/base_gic.hh"
+#include "dev/arm/hdlcd.hh"
+#include "mem/packet.hh"
+#include "mem/packet_access.hh"
+#include "sim/system.hh"
+
+using std::vector;
+
+
+// initialize hdlcd registers
+HDLcd::HDLcd(const Params *p)
+ : AmbaDmaDevice(p), version(VERSION_RESETV),
+ int_rawstat(0), int_clear(0), int_mask(0), int_status(0),
+ fb_base(0), fb_line_length(0), fb_line_count(0), fb_line_pitch(0),
+ bus_options(BUS_OPTIONS_RESETV),
+ v_sync(0), v_back_porch(0), v_data(0), v_front_porch(0),
+ h_sync(0), h_back_porch(0), h_data(0), h_front_porch(0),
+ polarities(0), command(0), pixel_format(0),
+ red_select(0), green_select(0), blue_select(0),
+ pixelClock(p->pixel_clock), vnc(p->vnc), bmp(NULL), pic(NULL),
+ frameReadStartTime(0),
+ dmaStartAddr(0), dmaCurAddr(0), dmaMaxAddr(0), dmaPendingNum(0),
+ frameUnderrun(false), virtualDisplayBuffer(NULL), pixelBufferSize(0),
+ pixelIndex(0), doUpdateParams(false), frameUnderway(false),
+ dmaBytesInFlight(0),
+ startFrameEvent(this), endFrameEvent(this), renderPixelEvent(this),
+ fillPixelBufferEvent(this), intEvent(this),
+ dmaDoneEventAll(MAX_OUTSTANDING_DMA_REQ_CAPACITY, this),
+ dmaDoneEventFree(MAX_OUTSTANDING_DMA_REQ_CAPACITY)
+{
+ pioSize = 0xFFFF;
+
+ for (int i = 0; i < MAX_OUTSTANDING_DMA_REQ_CAPACITY; ++i)
+ dmaDoneEventFree[i] = &dmaDoneEventAll[i];
+
+ if (vnc)
+ vnc->setFramebufferAddr(NULL);
+}
+
+HDLcd::~HDLcd()
+{
+ if (virtualDisplayBuffer)
+ delete [] virtualDisplayBuffer;
+}
+
+// read registers and frame buffer
+Tick
+HDLcd::read(PacketPtr pkt)
+{
+ uint32_t data = 0;
+ const Addr daddr = pkt->getAddr() - pioAddr;
+
+ DPRINTF(HDLcd, "read register BASE+0x%04x size=%d\n", daddr,
+ pkt->getSize());
+
+ assert(pkt->getAddr() >= pioAddr &&
+ pkt->getAddr() < pioAddr + pioSize &&
+ pkt->getSize() == 4);
+
+ pkt->allocate();
+
+ switch (daddr) {
+ case Version:
+ data = version;
+ break;
+ case Int_RawStat:
+ data = int_rawstat;
+ break;
+ case Int_Clear:
+ panic("HDLCD INT_CLEAR register is Write-Only\n");
+ break;
+ case Int_Mask:
+ data = int_mask;
+ break;
+ case Int_Status:
+ data = int_status;
+ break;
+ case Fb_Base:
+ data = fb_base;
+ break;
+ case Fb_Line_Length:
+ data = fb_line_length;
+ break;
+ case Fb_Line_Count:
+ data = fb_line_count;
+ break;
+ case Fb_Line_Pitch:
+ data = fb_line_pitch;
+ break;
+ case Bus_Options:
+ data = bus_options;
+ break;
+ case V_Sync:
+ data = v_sync;
+ break;
+ case V_Back_Porch:
+ data = v_back_porch;
+ break;
+ case V_Data:
+ data = v_data;
+ break;
+ case V_Front_Porch:
+ data = v_front_porch;
+ break;
+ case H_Sync:
+ data = h_sync;
+ break;
+ case H_Back_Porch:
+ data = h_back_porch;
+ break;
+ case H_Data:
+ data = h_data;
+ break;
+ case H_Front_Porch:
+ data = h_front_porch;
+ break;
+ case Polarities:
+ data = polarities;
+ break;
+ case Command:
+ data = command;
+ break;
+ case Pixel_Format:
+ data = pixel_format;
+ break;
+ case Red_Select:
+ data = red_select;
+ break;
+ case Green_Select:
+ data = green_select;
+ break;
+ case Blue_Select:
+ data = blue_select;
+ break;
+ default:
+ panic("Tried to read HDLCD register that doesn't exist\n", daddr);
+ break;
+ }
+
+ pkt->set<uint32_t>(data);
+ pkt->makeAtomicResponse();
+ return pioDelay;
+}
+
+// write registers and frame buffer
+Tick
+HDLcd::write(PacketPtr pkt)
+{
+ assert(pkt->getAddr() >= pioAddr &&
+ pkt->getAddr() < pioAddr + pioSize &&
+ pkt->getSize() == 4);
+
+ const uint32_t data = pkt->get<uint32_t>();
+ const Addr daddr = pkt->getAddr() - pioAddr;
+
+ DPRINTF(HDLcd, "write register BASE+%0x04x <= 0x%08x\n", daddr,
+ pkt->get<uint32_t>());
+
+ switch (daddr) {
+ case Version:
+ panic("HDLCD VERSION register is read-Only\n");
+ break;
+ case Int_RawStat:
+ int_rawstat = data;
+ break;
+ case Int_Clear:
+ int_clear = data;
+ break;
+ case Int_Mask:
+ int_mask = data;
+ break;
+ case Int_Status:
+ panic("HDLCD INT_STATUS register is read-Only\n");
+ break;
+ case Fb_Base:
+ fb_base = data;
+ DPRINTF(HDLcd, "HDLCD Frame Buffer located at addr 0x%08x\n", fb_base);
+ break;
+ case Fb_Line_Length:
+ fb_line_length = data;
+ DPRINTF(HDLcd, "HDLCD res = %d x %d\n", width(), height());
+ break;
+ case Fb_Line_Count:
_______________________________________________
gem5-dev mailing list
[email protected]
http://m5sim.org/mailman/listinfo/gem5-dev
