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Ship it! Ship It! - Ali Saidi On April 17, 2013, 1:58 p.m., Gedare wrote: > > ----------------------------------------------------------- > This is an automatically generated e-mail. To reply, visit: > http://reviews.gem5.org/r/1828/ > ----------------------------------------------------------- > > (Updated April 17, 2013, 1:58 p.m.) > > > Review request for Default. > > > Description > ------- > > x86: Squash outstanding walks when instructions are squashed. > > This is the x86 version of the ARM changeset 9258 > (http://repo.gem5.org/gem5/rev/baa17ba80e06) and the related discussions at > http://www.mail-archive.com/[email protected]/msg02810.html > > > Diffs > ----- > > src/arch/x86/X86TLB.py c22628fa25646077ed4f18a811f348b47a64bd5d > src/arch/x86/pagetable_walker.hh c22628fa25646077ed4f18a811f348b47a64bd5d > src/arch/x86/pagetable_walker.cc c22628fa25646077ed4f18a811f348b47a64bd5d > > Diff: http://reviews.gem5.org/r/1828/diff/ > > > Testing > ------- > > Tested with gem5 tip using x86_64-vmlinux-2.6.22.9 and a custom application > that trips the assertion error : cpu->instcount <= 1500. When 4 translations > are squashed per cycle, the assertion is no longer tripped. (With 2 squashes > per cycle, the assertion is still hit.) > > > Thanks, > > Gedare > > _______________________________________________ gem5-dev mailing list [email protected] http://m5sim.org/mailman/listinfo/gem5-dev
