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Review request for Default. Description ------- Changeset 9691:653ccf64061a --------------------------- arch: Create a method to finalize physical addresses in the TLB Some architectures (currently only x86) require some fixing-up of physical addresses after a normal address translation. This is usually to remap devices such as the APIC, but could be used for other memory mapped devices as well. When simulating the CPU using hardware virtualization, we still need to do these address fix-ups before inserting the request into the memory system. This patch allows that code to be used by such CPUs without doing full address translations. Diffs ----- src/arch/alpha/tlb.hh 00dca8a9b560 src/arch/alpha/tlb.cc 00dca8a9b560 src/arch/arm/tlb.hh 00dca8a9b560 src/arch/arm/tlb.cc 00dca8a9b560 src/arch/mips/tlb.hh 00dca8a9b560 src/arch/mips/tlb.cc 00dca8a9b560 src/arch/power/tlb.hh 00dca8a9b560 src/arch/power/tlb.cc 00dca8a9b560 src/arch/sparc/tlb.hh 00dca8a9b560 src/arch/sparc/tlb.cc 00dca8a9b560 src/arch/x86/tlb.hh 00dca8a9b560 src/arch/x86/tlb.cc 00dca8a9b560 src/sim/tlb.hh 00dca8a9b560 src/sim/tlb.cc 00dca8a9b560 Diff: http://reviews.gem5.org/r/1860/diff/ Testing ------- Quick regressions pass (with the exception of 02.insttest and 40.m5threads-test-atomic where I can't find the binaries) for all supported architectures. Boots Linux in KVM mode on x86 when applied together with #1861 (x86 requires APIC remapping magic from the TLB). Thanks, Andreas Sandberg _______________________________________________ gem5-dev mailing list [email protected] http://m5sim.org/mailman/listinfo/gem5-dev
