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Review request for Default. Description ------- Changeset 9736:a40008d23a51 --------------------------- config: Remove redundant default clocks This patch removes the clocks of certain instances of CoherentBus, NonCoherentBus and IOCache where the specified clock is same as the default value of the system clock. As all the values used are the defaults, there are no performance changes. There are similar cases where the toL2Bus is set to use the parent CPU clock which is already the default behaviour. The main motivation for these simplifications is to ease the introduction of clock domains. Diffs ----- configs/example/fs.py 782b7284de21 src/cpu/BaseCPU.py 782b7284de21 src/dev/CopyEngine.py 782b7284de21 src/dev/arm/RealView.py 782b7284de21 src/mem/ruby/system/RubySystem.py 782b7284de21 tests/configs/base_config.py 782b7284de21 tests/configs/memtest.py 782b7284de21 tests/configs/tgen-simple-dram.py 782b7284de21 tests/configs/tgen-simple-mem.py 782b7284de21 Diff: http://reviews.gem5.org/r/1878/diff/ Testing ------- All regressions pass without any changes Thanks, Andreas Hansson _______________________________________________ gem5-dev mailing list [email protected] http://m5sim.org/mailman/listinfo/gem5-dev
