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Ship it! Andreas, why should the compiler not raise an error on this? Did we not have this separate class Cycles to prevent such code? - Nilay Vaish On May 23, 2013, 12:50 a.m., Andreas Hansson wrote: > > ----------------------------------------------------------- > This is an automatically generated e-mail. To reply, visit: > http://reviews.gem5.org/r/1877/ > ----------------------------------------------------------- > > (Updated May 23, 2013, 12:50 a.m.) > > > Review request for Default. > > > Description > ------- > > Changeset 9734:6b92a6ec3706 > --------------------------- > mem: Cycles converted to Ticks in atomic cache accesses > > This patch fixes an outstanding issue in the cache timing calculations > where an atomic access returned a time in Cycles, but the port > forwarded it on as if it was in Ticks. > > A separate patch will update the regression stats. > > > Diffs > ----- > > src/mem/cache/cache.hh 782b7284de21 > src/mem/cache/cache_impl.hh 782b7284de21 > > Diff: http://reviews.gem5.org/r/1877/diff/ > > > Testing > ------- > > All regressions pass after stats updates > > > Thanks, > > Andreas Hansson > > _______________________________________________ gem5-dev mailing list [email protected] http://m5sim.org/mailman/listinfo/gem5-dev
